LTC3878_15 Datasheet, PDF (19/26 Pages) Linear Technology – Fast, Wide Operating Range No RSENSE Step-Down DC/DC Controller

LTC3878
Applications Information
l Use planes for V_IN and V_OUT to maintain good voltage
filtering and to keep power losses low.
l Flood all unused areas on all layers with copper. Flooding
with copper will reduce the temperature rise of power
component. You can connect the copper areas to any
DC net. (V_IN, V_OUT , GND or to any other DC rail in your
system).
l Place decoupling capacitor C_C2 next to the I_TH and SGND
pins with short, direct trace connections.
When laying out a printed circuit board without a ground
plane, use the following checklist to ensure proper operation
of the controller. These items are illustrated in Figure 7.
l Segregate the signal and power grounds. All small-signal
components should return to the SGND pin at one point.
SGND and PGND should be tied together underneath
the IC and then connect directly to the source of M2.
l Place M2 as close to the controller as possible, keeping
the PGND, BG and SW traces short.
l Keep the high dV/dT SW, BOOST and TG nodes away
from sensitive small-signal nodes.
l Connect the input capacitor(s), C_IN, close to the
power MOSFETs. This capacitor carries the MOSFET AC
current.
l Connect the INTV_CC decoupling capacitor C_VCC closely
to the INTV_CC and PGND pins.
l Connect the top driver boost capacitor, C_B, closely to
the BOOST and SW pins.
l Connect the V_IN pin decoupling C_F closely to the V_IN
and PGND pins.
C_SS
C_{C1 RC}
R1
R2
1 _{RUN/SS BOOST} 16
2 _PGOOD
TG ¹⁵
3 _VRNG
SW ¹⁴
LTC3878
4 _FCB
PGND ¹³
5
C_{C2 6}
I_TH
SGND
7 _ION
8 _VFB
R_ON
BG ¹²
INTV_CC ¹¹
V_IN ¹⁰
NC ⁹
C_B
D_B
C_VCC
C_F
R_F
L
M1
C_IN
M2
C_OUT
+
V_IN
–
–
V_OUT
+
BOLD LINES INDICATE HIGH CURRENT PATHS
3878 F08
Figure 8. LTC3878 Layout Diagram Without Ground Plane
3878fa
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