LTC3878_15 Datasheet, PDF (16/26 Pages) Linear Technology – Fast, Wide Operating Range No RSENSE Step-Down DC/DC Controller

LTC3878
Applications Information
Regulator output current is negative when I_TH is between
0V and 0.8V and positive when I_TH is between 0.8V and the
maximum full-scale set-point of 2.4V. In normal operating
conditions the RUN/SS pin will continue to charge positive
until the voltage is equal to INTV_CC.
INTV_CC Undervoltage Lockout
Whenever INTV_CC drops below approximately 3.4V, the
device enters undervoltage lockout (UVLO). In a UVLO
condition, the switching outputs TG and BG are disabled.
At the same time, the RUN/SS pin is pulled down from
INTV_CC to 0.8V with a 3µA current source. When the
INTV_CC UVLO condition is removed, RUN/SS ramps from
0.8V and begins a normal current limited soft-start. This
feature is important when regulator start-up is not initi-
ated by applying a logic drive to RUN/SS. Soft-start from
INTV_CC UVLO release greatly reduces the possibility for
start-up oscillations caused by the regulator starting up
at INTV_CC(UVLOR) and then shutting down at INTV_CC(UVLO)
due to inrush current.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Although all dissipative
elements in the circuit produce losses, four main sources
account for most of the losses in LTC3878 circuits.
1. DC I²R losses. These arise from the resistances of the
MOSFETs, inductor and PC board traces and cause the
efficiency to drop at high output currents. In continuous
mode the average output current flows though the inductor
L, but is chopped between the top and bottom MOSFETs.
If the two MOSFETs have approximately the same R_DS(ON),
then the resistance of one MOSFET can simply by summed
with the resistances of L and the board traces to obtain
the DC I²R loss. For example, if R_DS(ON) = 0.01Ω and
R_L = 0.005Ω, the loss will range from 15mW to 1.5W as
the output current varies from 1A to 10A.
2. Transition loss. This loss arises from the brief amount
of time the top MOSFET spends in the saturated region
during switch node transitions. It depends upon the
16
input voltage, load current, driver strength and MOSFET
capacitance, among other factors. The loss is significant
at input voltages above 20V.
3. INTV_CC current. This is the sum of the MOSFET driver
and control currents.
4. C_IN loss. The input capacitor has the difficult job of filter-
ing the large RMS input current to the regulator. It must have
a very low ESR to minimize the AC I²R loss and sufficient
capacitance to prevent the RMS current from causing ad-
ditional upstream losses in fuses or batteries.
Other losses, which include the C_OUT ESR loss, bottom
MOSFET reverse recovery loss and inductor core loss
generally account for less than 2% additional loss.
When making adjustments to improve efficiency, the input
current is the best indicator of changes in efficiency. If you
make a change and the input current decreases, then the
efficiency has increased. If there is no change in input
current there is no change in efficiency.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V_OUT immediately shifts by an amount
equal to ∆I_LOAD (ESR), where ESR is the effective series
resistance of C_OUT. ∆I_LOAD also begins to charge or dis-
charge C_OUT, generating a feedback error signal used by the
regulator to return V_OUT to its steady-state value. During
this recovery time, V_OUT can be monitored for overshoot
or ringing that would indicate a stability problem. The I_TH
pin external components shown in the Design Example will
provide adequate compensation for most applications.
A rough compensation check can be made by calculating
the gain crossover frequency, f_GCO. g_m(EA) is the error
amplifier transconductance, R_C is the compensation re-
sistor and feedback divider attenuation is assumed to be
0.8V/V_OUT. This equation assumes that no feed-forward
compensation is used on feedback and that C_OUT sets the
dominant output pole.
f_GCO =
g_m(EA) • R_C
• ^ILIMIT
1.6
•
2•π
1
• C_OUT
•
0.8
V_OUT
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