LTC3729_15 Datasheet, PDF (18/30 Pages) Linear Technology – 550kHz, PolyPhase, High Efficiency, Synchronous Step-Down Switching Regulator

LTC3729
APPLICATIONS INFORMATION
pulled all the way to ground there is a delay before starting
of approximately:
t
DELAY
=
1.5V
1.2µA
C_SS
=
(1.25s
/
µF
)C_SS
The time for the output current to ramp up is then:
V_IN
3.3V OR 5V
RUN/SS
D1
R_SS*
C_SS
INTV_CC
R_SS*
D1*
RUN/SS
C_SS
t
RAMP
=
3V − 1.5V
1.2µA
C_SS
=
(1.25s
/
µF
)C_SS
By pulling the RUN/SS pin below 0.8V the LTC3729 is
put into low current shutdown (I_Q < 40µA). RUN/SS can
be driven directly from logic as shown in Figure 6. Diode
D1 in Figure 6 reduces the start delay but allows C_SS to
ramp up slowly providing the soft-start function. The
RUN/SS pin has an internal 6V zener clamp (see Functional
Diagram).
Fault Conditions: Overcurrent Latchoff
The RUN/SS pin also provides the ability to latch off the
controllers when an overcurrent condition is detected.
The RUN/SS capacitor, C_SS, is used initially to limit the
inrush current of both controllers. After the controllers
have been started and been given adequate time to charge
up the output capacitors and provide full load current, the
RUN/SS capacitor is used for a short-circuit timer. If the
output voltage falls to less than 70% of its nominal value
after C_SS reaches 4.1V, C_SS begins discharging on the as‑
sumption that the output is in an overcurrent condition. If
the condition lasts for a long enough period as determined
by the size of C_SS, the controller will be shut down until
the RUN/SS pin voltage is recycled. If the overload occurs
during start-up, the time can be approximated by:
t_LO1 ≈ (C_SS • 0.6V)/(1.2µA) = 5 • 10⁵ (C_SS)
If the overload occurs after start-up, the voltage on C_SS
will continue charging and will provide additional time
before latching off:
t_LO2 ≈ (C_SS • 3V)/(1.2µA) = 2.5 • 10⁶ (C_SS)
This built-in overcurrent latchoff can be overridden by
providing a pull-up resistor, R_SS, to the RUN/SS pin as
shown in Figure 6. This resistance shortens the soft-
start period and prevents the discharge of the RUN/SS
capacitor during a severe overcurrent and/or short-circuit
18
*OPTIONAL TO DEFEAT OVERCURRENT LATCHOFF
3729 F06
Figure 6. RUN/SS Pin Interfacing
condition. When deriving the 5µA current from V_IN as
in the figure, current latchoff is always defeated. Diode-
connecting this pull-up resistor to INTV_CC, as in Figure 6,
eliminates any extra supply current during shutdown
while eliminating the INTV_CC loading from preventing
controller start-up.
Why should you defeat current latchoff? During the pro‑
totyping stage of a design, there may be a problem with
noise pickup or poor layout causing the protection circuit
to latch off the controller. Defeating this feature allows
troubleshooting of the circuit and PC layout. The internal
short-circuit and foldback current limiting still remains
active, thereby protecting the power supply system from
failure. A decision can be made after the design is com‑
plete whether to rely solely on foldback current limiting
or to enable the latchoff feature by removing the pull-up
resistor.
The value of the soft-start capacitor C_SS may need to
be scaled with output voltage, output capacitance and
load current characteristics. The minimum soft-start
capacitance is given by:
C_SS > (C_OUT )(V_OUT)(10^-4)(R_SENSE)
The minimum recommended soft-start capacitor of C_SS =
0.1µF will be sufficient for most applications.
Phase-Locked Loop and Frequency Synchronization
The LTC3729 has a phase-locked loop comprised of an
internal voltage controlled oscillator and phase detector.
This allows the top MOSFET turn-on to be locked to the
rising edge of an external source. The frequency range
of the voltage controlled oscillator is ±50% around the
center frequency f_O. A voltage applied to the PLLFLTR
pin of 1.2V corresponds to a frequency of approximately
3729fb