LTC3834 Datasheet, PDF (15/28 Pages) Linear Technology – 30μA IQ Synchronous Step-Down Controller

LTC3834
APPLICATIONS INFORMATION
C_IN and C_OUT Selection
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle (V_OUT)/(V_IN). To prevent
large voltage transients, a low ESR capacitor sized for the
maximum RMS current must be used. The maximum RMS
capacitor current is given by:
( )( ) ^C_IN
Required
I_RMS
≈
I_MAX
V_IN
⎡⎣
V_OUT
V_IN – V_OUT ⎤⎦^1/2
This formula has a maximum at V_IN = 2V_OUT, where I_RMS
= I_OUT/2. This simple worst-case condition is commonly
used for design because even significant deviations do not
offer much relief. Note that capacitor manufacturers’ ripple
current ratings are often based on only 2000 hours of life.
This makes it advisable to further derate the capacitor, or
to choose a capacitor rated at a higher temperature than
required. Several capacitors may be paralleled to meet
size or height requirements in the design. Due to the high
operating frequency of the LTC3834, ceramic capacitors
can also be used for C_IN. Always consult the manufacturer
if there is any question.
The selection of C_OUT is driven by the effective series
resistance (ESR). Typically, once the ESR requirement
is satisfied, the capacitance is adequate for filtering. The
output ripple (ΔV_OUT) is approximated by:
ΔV_OUT
≈
I_RIPPLE
⎛
⎝⎜
ESR
+
1
8fC_OUT
⎞
⎠⎟
where f is the operating frequency, C_OUT is the output
capacitance and I_RIPPLE is the ripple current in the induc-
tor. The output ripple is highest at maximum input voltage
since I_RIPPLE increases with input voltage.
Setting Output Voltage
The LTC3834 output voltage is set by an external feed-
back resistor divider carefully placed across the output,
as shown in Figure 1. The regulated output voltage is
determined by:
V_OUT
=
0.8V
•
⎛
⎝⎜
1+
R_B
R_A
⎞
⎠⎟
V_OUT
LTC3834
V_FB
R_B
C_FF
R_A
3834 F01
Figure 1. Setting Output Voltage
200
100
0
–100
–200
–300
–400
–500
–600
–700
0
1 2 3 4 5 6 7 8 9 10
V_SENSE COMMON MODE VOLTAGE (V)
3835 F02
Figure 2. SENSE Pins Input Bias Current
vs Common Mode Voltage
To improve the frequency response, a feed-forward ca-
pacitor, C_FF, may be used. Great care should be taken to
route the V_FB line away from noise sources, such as the
inductor and the SW line.
SENSE⁺ and SENSE^– Pins
The common mode input range of the current comparator
is from 0V to 10V. Continuous linear operation is provided
throughout this range allowing output voltages from 0.8V
to 10V. The input stage of the current comparator requires
that current either be sourced or sunk from the SENSE pins
depending on the output voltage, as shown in the curve in
Figure 2. If the output voltage is below 1.5V, current will
flow out of both SENSE pins to the main output. In these
cases, the output can be easily pre-loaded by the V_OUT
resistor divider to compensate for the current comparator’s
negative input bias current. Since V_FB is servoed to the
0.8V reference voltage, R_A in Figure 1 should be chosen
to be less than 0.8V/I_SENSE, with I_SENSE determined from
Figure 2 at the specified output voltage.
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