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LTC3737 Datasheet, PDF (15/24 Pages) Linear Technology – Dual 2-Phase, No RSENSE DC/DC Controller with Output Tracking
LTC3737
APPLICATIO S I FOR ATIO
where PD is the allowable power dissipation and will be
determined by efficiency and/or thermal requirements.
A Schottky diode is a good choice for low forward drop and
fast switching time. Remember to keep lead length short
and observe proper grounding to avoid ringing and
increased dissipation.
CIN and COUT Selection
The selection of CIN is simplified by the 2-phase architec-
ture and its impact on the worst-case RMS current drawn
through the input network (battery/fuse/capacitor). It can
be shown that the worst-case capacitor RMS current
occurs when only one controller is operating. The control-
ler with the highest VOUT • IOUT product needs to be used
in the formula below to determine the maximum RMS
capacitor current requirement. Increasing the output cur-
rent drawn from the other controller will actually decrease
the input RMS ripple current from its maximum value. The
out-of-phase technique typically reduces the input
capacitor’s RMS ripple current by a factor of 30% to 70%
when compared to a single phase power supply solution.
In continuous mode, the source current of the P-channel
MOSFET is a square wave of duty cycle (VOUT + VD)/
(VIN + VD). To prevent large voltage transients, a low ESR
capacitor sized for the maximum RMS current of one
channel must be used. The maximum RMS capacitor
current is given by:
CIN Required IRMS ≈
[ ] ( )( ) IMAX
VIN + VD
VOUT + VD
VIN – VOUT 1/2
This formula has a maximum at VIN = 2VOUT + VD, where
IRMS = IOUT/2. This simple worst-case condition is com-
monly used for design because even significant deviations
do not offer much relief. Note that capacitor manufactur-
ers’ ripple current ratings are often based on only 2000
hours of life. This makes it advisable to further derate the
capacitor or to choose a capacitor rated at a higher
temperature than required. Several capacitors may be
paralleled to meet size or height requirements in the
design. Due to the high operating frequency of the LTC3737,
ceramic capacitors can also be used for CIN. Always
consult the manufacturer if there is any question.
The benefit of the LTC3737 2-phase operation can be
calculated by using the equation above for the higher
power controller and then calculating the loss that would
have resulted if both controller channels switched on at
the same time. The total RMS power lost is lower when
both controllers are operating due to the reduced overlap
of current pulses required through the input capacitor’s
ESR. This is why the input capacitor’s requirement calcu-
lated above for the worst-case controller is adequate for
the dual controller design. Also, the input protection fuse
resistance, battery resistance, and PC board trace resis-
tance losses are also reduced due to the reduced peak
currents in a 2-phase system. The overall benefit of a
multiphase design will only be fully realized when the
source impedance of the power supply/battery is included
in the efficiency testing. The sources of the P-channel
MOSFETs should be placed within 1cm of each other and
share a common CIN(s). Separating the sourced and CIN
may produce undesirable voltage and current resonances
at VIN.
A small (0.1µF to 1µF) bypass capacitor between the chip
VIN pin and ground, placed close to the LTC3737, is also
suggested. A 10Ω resistor placed between CIN and the VIN
pin provides further isolation between the two channels.
The selection of COUT is driven by the effective series
resistance (ESR). Typically, once the ESR requirement is
satisfied, the capacitance is adequate for filtering. The
output ripple (∆VOUT) is approximated by:
∆VOUT
≈
IRIPPLEESR
+
1
8fCOUT


where f is the operating frequency, COUT is the output
capacitance and IRIPPLE is the ripple current in the induc-
tor. The output ripple is highest at maximum input voltage
since IRIPPLE increases with input voltage.
3737f
15