LTC3411_15 Datasheet, PDF (15/24 Pages) Linear Technology – 1.25A, 4MHz, Synchronous Step-Down DC/DC Converter

LTC3411
APPLICATIONS INFORMATION
In some applications, a more severe transient can be caused
by switching in loads with large (>1uF) input capacitors.
The discharged input capacitors are effectively put in paral-
lel with C_OUT, causing a rapid drop in V_OUT. No regulator
can deliver enough current to prevent this problem, if the
switch connecting the load has low resistance and is driven
quickly. The solution is to limit the turn-on speed of the load
switch driver. A hot swap controller is designed specifically
for this purpose and usually incorporates current limiting,
short-circuit protection, and soft-starting.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
produce the most improvement. Percent efficiency can
be expressed as:
%Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of
the losses in LTC3411 circuits: 1) LTC3411 V_IN current,
2) switching losses, 3) I²R losses, 4) other losses.
1) The V_IN current is the DC supply current given in the
electrical characteristics which excludes MOSFET driver
and control currents. V_IN current results in a small (<0.1%)
loss that increases with V_IN, even at no load.
2) The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current results
from switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high
to low again, a packet of charge dQ moves from V_IN to
ground. The resulting dQ/dt is a current out of V_IN that is
typically much larger than the DC bias current. In continu-
ous mode, I_GATECHG = f_O(QT + QB), where QT and QB are
the gate charges of the internal top and bottom MOSFET
switches. The gate charge losses are proportional to V_IN
and thus their effects will be more pronounced at higher
supply voltages.
3) I²R Losses are calculated from the DC resistances of
the internal switches, R_SW, and external inductor, RL. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the internal top
and bottom switches. Thus, the series resistance look-
ing into the SW pin is a function of both top and bottom
MOSFET R_DS(ON) and the duty cycle (DC) as follows:
R_SW = (R_DS(ON)TOP)(DC) + (R_DS(ON)BOT)(1 – DC)
The R_DS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteristics
curves. Thus, to obtain I²R losses:
I²R losses = I_OUT2(R_SW + RL)
4) Other “hidden” losses such as copper trace and internal
battery resistances can account for additional efficiency
degradations in portable systems. It is very important
to include these “system” level losses in the design of a
system. The internal battery and fuse resistance losses
can be minimized by making sure that C_IN has adequate
charge storage and very low ESR at the switching frequency.
Other losses including diode conduction losses during
dead-time and inductor core losses generally account for
less than 2% total additional loss.
Thermal Considerations
In a majority of applications, the LTC3411 does not dis-
sipate much heat due to its high efficiency. However, in
applications where the LTC3411 is running at high ambient
temperature with low supply voltage and high duty cycles,
such as in dropout, the heat dissipated may exceed the
maximum junction temperature of the part. If the junction
temperature reaches approximately 150°C, both power
switches will be turned off and the SW node will become
high impedance.
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