LTC3411_15 Datasheet, PDF (13/24 Pages) Linear Technology – 1.25A, 4MHz, Synchronous Step-Down DC/DC Converter

LTC3411
APPLICATIONS INFORMATION
Shutdown and Soft-Start
The SHDN/R_T pin is a dual purpose pin that sets the oscil-
lator frequency and provides a means to shut down the
LTC3411. This pin can be interfaced with control logic in
several ways, as shown in Figure 3(a) and Figure 3(b).
The I_TH pin is primarily for loop compensation, but it can
also be used to increase the soft-start time. Soft start
reduces surge currents from V_IN by gradually increasing
the peak inductor current. Power supply sequencing can
also be accomplished using this pin. The LTC3411 has an
internal digital soft-start which steps up a clamp on I_TH
over 1024 clock cycles, as can be seen in Figure 4.
The soft-start time can be increased by ramping the volt-
age on I_TH during start-up as shown in Figure 3(c). As
the voltage on I_TH ramps through its operating range the
internal peak current limit is also ramped at a proportional
linear rate.
Mode Selection and Frequency Synchronization
The SYNC/MODE pin is a multipurpose pin which provides
mode selection and frequency synchronization. Connect-
ing this pin to V_IN enables Burst Mode operation, which
provides the best low current efficiency at the cost of a
higher output voltage ripple. When this pin is connected to
ground, pulse skipping operation is selected which provides
the lowest output voltage and current ripple at the cost
of low current efficiency. Applying a voltage between 1V
and SV_IN – 1, results in forced continuous mode, which
creates a fixed output ripple and is capable of sinking
some current (about 1/2ΔI_L). Since the switching noise is
constant in this mode, it is also the easiest to filter out. In
many cases, the output voltage can be simply connected to
the SYNC/MODE pin, giving the forced continuous mode,
except at startup.
The LTC3411 can also be synchronized to an external clock
signal by the SYNC/MODE pin. The internal oscillator fre-
quency should be set to 20% lower than the external clock
frequency to ensure adequate slope compensation, since
slope compensation is derived from the internal oscillator.
During synchronization, the mode is set to pulse skipping
and the top switch turn on is synchronized to the rising
edge of the external clock.
Checking Transient Response
The OPTI-LOOP compensation allows the transient re-
sponse to be optimized for a wide range of loads and
output capacitors. The availability of the I_TH pin not only
allows optimization of the control loop behavior but also
provides a DC coupled and AC filtered closed loop response
test point. The DC step, rise time and settling at this test
point truly reflects the closed loop response. Assuming a
predominantly second order system, phase margin and/or
damping factor can be estimated using the percentage of
RUN
SHDN/R_T
R_T
SHDN/R_T SV_IN
R_T
1M
3411 F03a
RUN
(3a)
RUN OR V_IN I_TH
R1 _D1
R_C
(3b)
3411 F03b
C1
(3c)
C_C
3411 F03c
Figure 3. SHDN/R_T Pin Interfacing and External Soft-Start
V_IN
2V/DIV
V_OUT
2V/DIV
I_L1
500mA/DIV
V_IN = 3.3V
V_OUT = 2.5V
R_L = 1.4Ω
200μs/DIV
3411 F04
Figure 4. Digital Soft-Start
3411fb
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