LTC3832-1_15 Datasheet, PDF (13/24 Pages) Linear Technology – High Power Step-Down Synchronous DC/DC Controllers for Low Voltage Operation

LTC3832/LTC3832-1
APPLICATIO S I FOR ATIO
Diagram). This increases the G2 on-time and allows the
charge pump capacitors to be refreshed.
For applications using an external supply to PV_CC1, this
supply must also be higher than V_CC by at least 2.5V to
ensure normal operation.
For applications with a 5V or higher V_IN supply, PV_CC2 can
be tied to V_IN if a logic level MOSFET is used. PV_CC1 can be
supplied using a doubling charge pump as shown in
Figure␣ 9. This circuit provides 2V_IN – V_F to PV_CC1 while Q1
is ON.
V_IN
OPTIONAL
USE FOR V_IN ≥ 7V
D_Z
12V
1N5242
PV_CC2
MBR0530T1
PV_CC1
G1
0.1µF
Q1
L_O
G2
Q2
V_OUT
+
C_OUT
LTC3832
3832 F09
Figure 9. Doubling Charge Pump
Power MOSFETs
Two N-channel power MOSFETs are required for most
LTC3832 circuits. These should be selected based
primarily on threshold voltage and on-resistance consid-
erations. Thermal dissipation is often a secondary con-
cern in high efficiency designs. The required MOSFET
threshold should be determined based on the available
power supply voltages and/or the complexity of the gate
drive charge pump scheme. In 3.3V input designs where
an auxiliary 12V supply is available to power PV_CC1 and
PV_CC2, standard MOSFETs with R_DS(ON) specified at V_GS
= 5V or 6V can be used with good results. The current
drawn from this supply varies with the MOSFETs used
and the LTC3832’s operating frequency, but is generally
less than 50mA.
LTC3832 applications that use 5V or lower V_IN voltage and
a doubling/tripling charge pump to generate PV_CC1 and
PV_CC2, do not provide enough gate drive voltage to fully
enhance standard power MOSFETs. Under this condition,
the effective MOSFET R_DS(ON) may be quite high, raising
the dissipation in the FETs and reducing efficiency. Logic
level FETs are the recommended choice for 5V or lower
voltage systems. Logic level FETs can be fully enhanced
with a doubler/tripling charge pump and will operate at
maximum efficiency.
After the MOSFET threshold voltage is selected, choose the
R_DS(ON) based on the input voltage, the output voltage,
allowable power dissipation and maximum output current.
In a typical LTC3832 circuit, operating in continuous mode,
the average inductor current is equal to the output load
current. This current flows through either Q1 or Q2 with the
power dissipation split up according to the duty cycle:
DC(Q1) = ^VOUT
V_IN
DC(Q2) = 1– ^VOUT = ^{VIN – VOUT}
V_IN
V_IN
The R_DS(ON) required for a given conduction loss can now
be calculated by rearranging the relation P = I²R.
R_DS(ON)Q1 =
P_MAX(Q1)
DC(Q1) • (I_LOAD)²
=
V_IN • P_MAX(Q1)
V_OUT • (I_LOAD)²
R_DS(ON)Q2
=
P_MAX(Q2)
DC(Q2) • (I_LOAD)²
=
V_IN • P_MAX(Q2)
(V_IN – V_OUT) • (I_LOAD)²
P_MAX should be calculated based primarily on required
efficiency or allowable thermal dissipation. A typical high
efficiency circuit designed for 3.3V input and 2.5V at 10A
output might allow no more than 3% efficiency loss at full
load for each MOSFET. Assuming roughly 90% efficiency
at this current level, this gives a P_MAX value of:
(2.5V)(10A/0.9)(0.03) = 0.83W per FET
and a required R_DS(ON) of:
R_DS(ON)Q1
=
(3.3V) • (0.83W)
(2.5V)(10A)²
=
0.011Ω
R_DS(ON)Q2
=
(3.3V) • (0.83W)
(3.3V – 2.5V)(10A)²
= 0.034Ω
sn3832 3832fs
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