LTC3832-1_15 Datasheet, PDF (12/24 Pages) Linear Technology – High Power Step-Down Synchronous DC/DC Controllers for Low Voltage Operation

LTC3832/LTC3832-1
APPLICATIO S I FOR ATIO
V_CC
PV_CC2 PV_CC1
V_IN
INTERNAL
CIRCUITRY
LTC3832
G1
Q1
L_O
V_OUT
G2
Q2
+
C_OUT
3832 F6
Figure 6. LTC3832 Power Supplies
V_CC/PV_CC2
PV_CC1
V_IN
INTERNAL
CIRCUITRY
LTC3832-1
G1
Q1
L_O
V_OUT
G2
Q2
+
C_OUT
3832 F7
Figure 7. LTC3832-1 Power Supplies
In many applications, V_CC can be powered from V_IN
through an RC filter. This supply can be as low as 3V. The
low quiescent current (typically 800µA) allows the use of
relatively large filter resistors and correspondingly small
filter capacitors. 100Ω and 4.7µF usually provide ad-
equate filtering for V_CC. For best performance, connect the
4.7µF bypass capacitor as close to the LTC3832 V_CC pin as
possible.
Gate drive for the top N-channel MOSFET Q1 is supplied
from PV_CC1. This supply must be above V_IN (the main
power supply input) by at least one power MOSFET V_GS(ON)
for efficient operation. An internal level shifter allows PV_CC1
to operate at voltages above V_CC and V_IN, up to 14V maxi-
mum. This higher voltage can be supplied with a separate
supply, or it can be generated using a charge pump.
Gate drive for the bottom MOSFET Q2 is provided through
PV_CC2 for the LTC3832 or V_CC/PV_CC2 for the LTC3832-1.
This supply only needs to be above the power MOSFET
V_GS(ON) for efficient operation. PV_CC2 can also be driven
from the same supply/charge pump for the PV_CC1, or it can
be connected to a lower supply to improve efficiency.
12
Figure 8 shows a tripling charge pump circuit that can be
used to provide 2V_IN and 3V_IN gate drive for the external
top and bottom MOSFETs respectively. These should fully
enhance MOSFETs with 5V logic level thresholds. This
circuit provides 3V_IN – 3V_F to PV_CC1 while Q1 is ON and
2V_IN – 2V_F to PV_CC2 where V_F is the forward voltage of the
Schottky diodes. The circuit requires the use of Schottky
diodes to minimize forward drop across the diodes at
start-up. The tripling charge pump circuit can rectify any
ringing at the drain of Q2 and provide more than 3V_IN at
PV_CC1; a 12V zener diode should be included from PV_CC1
to PGND to prevent transients from damaging the circuitry
at PV_CC1 or the gate of Q1.
The charge pump capacitors for PV_CC1 refresh when the
G2 pin goes high and the switch node is pulled low by Q2.
The G2 on-time becomes narrow when LTC3832/
LTC3832-1 operates at a maximum duty cycle (95%
typical), which can occur if the input supply rises more
slowly than the soft-start capacitor or if the input voltage
droops during load transients. If the G2 on-time gets so
narrow that the switch node fails to pull completely to
ground, the charge pump voltage may collapse or fail to
start, causing excessive dissipation in external MOSFET,
Q1. This condition is most likely with low V_CC voltages and
high switching frequencies, coupled with large external
MOSFETs which slow the G2 and switch node slew rates.
The LTC3832/LTC3832-1 overcome this problem by sens-
ing the PV_CC1 voltage when G1 is high. If PV_CC1 is less than
2.5V above V_CC, the maximum G1 duty cycle is reduced to
70% by clamping the COMP pin at 1.8V (QC in the Block
D_Z
1N5817
12V
1N5242
1N5817
V_IN
1N5817
10µF
PV_CC2
PV_CC1
G1
G2
0.1µF
0.1µF
Q1
L_O
Q2
V_OUT
+
C_OUT
LTC3832
3832 F08
Figure 8. Tripling Charge Pump
sn3832 3832fs