LTC3589_12 Datasheet, PDF (35/50 Pages) Linear Technology – 8-Output Regulator with Sequencing and I2C

LTC3589/LTC3589-1/
LTC3589-2
OPERATION
Figure 17 shows the timing of the IRQ pin and IRQSTAT
status register following a fault induced hard shutdown
event. When a fault occurs, IRQ is latched LOW and bit
IRQSTAT[3], IRQSTAT[5], or IRQSTAT[7] is set. IRQ re-
mains LOW until the CLIRQ command is issued. When the
CLIRQ command has been issued, the IRQSTAT status bit
remains set for the one second enable inhibit time or as
long as the fault condition persists, whichever is longer.
TSD, UV,
OR PGOOD FAULT
IRQ
IRQSTAT
1 SEC
1 SEC
CLIRQ
3589 F17
Figure 17. IRQ and IRQSTAT Status Register Fault Timing
Fault Induced Shutdown
Any of the three fault conditions will initiate a hard reset
shutdown triggering the following events: 1) A bit corre-
sponding to the fault is set in status register IRQSTAT, 2)
IRQ and WAKE pins are pulled LOW, 3) enable pin inputs
are ignored and the regulators are disabled, 4) all enable
bits and software control mode bit in the output voltage
enable OVEN command register are cleared, and 5) the
pushbutton controller is sent to the PDN state for one
second and then to POFF. Re-enabling of regulators is
inhibited until both the fault condition and the one second
time out have passed to allow regulator outputs sufficient
time to discharge. When one second timeout and the fault
condition are both passed, if PWR_ON is HIGH, WAKE will
come up and the LTC3589 will respond to any enable pins
that are also HIGH.
SDA
t_LOW
t_{SU, DAT}
SCL
t_{HD, STA}
START
CONDITION
t_HIGH
t_r
t_f
t_{HD, DAT}
t_{HD, STA}
t_{HD, STA}
t_SP
REPEATED START
CONDITION
Figure 18. LTC3589 I²C Timing
t_BUF
t_{SU, STO}
3589 F18
STOP
START
ADDRESS
0 1 1 0 1 0 0 WR
SUB ADDRESS
S7 S6 S5 S4 S3 S2 S1 S0
DATA
D7 D6 D5 D4 D3 D2 D1 D0
SUB ADDRESS
S7 S6 S5 S4 S3 S2 S1 S0
DATA
D7 D6 D5 D4 D3 D2 D1 D0
START
STOP
SDA
0 1 1 0 1 0 0 0 ACK
ACK
ACK
ACK
ACK
SCL
1 234567 89 1 234567 89 1 234567 89 1 234567 89 1 234567 89
3589 F19
Figure 19. LTC3589 I²C Serial Port Multiple Write Pattern
3589fe
35