LTC3839 Datasheet, PDF (31/50 Pages) Linear Technology – Fast, Accurate, 2-Phase, Single-Output Step-Down DC/DC Controller

LTC3839
APPLICATIONS INFORMATION
BG off to TG on. The minimum off-time that the LTC3839
can achieve is 90ns.
The effective minimum off-time of the switching regulator,
or the shortest period of time that the SW node can stay
low, can be different from this minimum off-time. The main
factor impacting the effective minimum off-time is the top
and bottom power MOSFETs’ electrical characteristics,
such as Qg and turn-on/off delays. These characteristics
can either extend or shorten the SW nodes’ effective
minimum off-time. Large size (high Qg) power MOSFETs
generally tend to increase the effective minimum off-time
due to longer gate charging and discharging times. On
the other hand, imbalances in turn-on and turn-off delays
could reduce the effective minimum off-time.
The minimum off-time limit imposes a maximum duty
cycle of:
D_MAX = 1 – f • t_OFF(MIN)
where t_OFF(MIN) is the effective minimum off-time of the
switching regulator. Reducing the operating frequency can
alleviate the maximum duty cycle constraint.
If the maximum duty cycle is reached, due to a drooping
input voltage for example, the output will drop out of
regulation. The minimum input voltage to avoid dropout is:
V_IN(MIN)
=
V_OUT
D_MAX
At the onset of drop-out, there is a region of V_IN of about
500mV that generates two discrete off-times, one being
the minimum off time and the other being an off-time that
is about 40ns to 60ns longer than the minimum off-time.
This secondary off-time is due to the extra delay in trip-
ping the internal current comparator. The two off-times
average out to the required duty cycle to keep the output
in regulation. There may be higher SW node jitter, apparent
especially when synchronized to an external clock, but the
output voltage ripple remains relatively small.
Fault Conditions: Current Limiting and Overvoltage
The maximum inductor current is inherently limited in a
current mode controller by the maximum sense voltage.
In the LTC3839, the maximum sense voltage is controlled
by the voltage on the V_RNG pin. With valley current mode
control, the maximum sense voltage and the sense re-
sistance determine the maximum allowed inductor valley
current. The corresponding output current limit is:
I_LIMIT
=
V_{SENSE(MAX )}
R_SENSE
+
1
2
•
ΔI_L
The current limit value should be checked to ensure that
I_LIMIT(MIN) > I_OUT(MAX). The current limit value should
be greater than the inductor current required to produce
maximum output power at the worst-case efficiency.
Worst-case efficiency typically occurs at the highest V_IN
and highest ambient temperature. It is important to check
for consistency between the assumed MOSFET junction
temperatures and the resulting value of I_LIMIT which heats
the MOSFET switches.
To further limit current in the event of a short circuit to
ground, the LTC3839 includes foldback current limiting.
If the output falls by more than 50%, the maximum sense
voltage is progressively lowered, to about 30% of its full
value as the feedback voltage reaches 0V.
A feedback voltage exceeding 7.5% of the regulated target
of 0.6V is considered as overvoltage (OV). In such an OV
condition, the top MOSFET is immediately turned off and
the bottom MOSFET is turned on indefinitely until the OV
condition is removed, i.e., the feedback voltage falling
back below the 7.5% threshold by more than a hysteresis
of typical 2%. Current limiting is not active during an OV.
If the OV persists, and the BG turns on for a longer time,
the current through the inductor and the bottom MOSFET
may exceed their maximum ratings, sacrificing themselves
to protect the load.
OPTI-LOOP Compensation
OPTI-LOOP compensation, through the availability of the
ITH pin, allows the transient response to be optimized for
a wide range of loads and output capacitors. The ITH pin
not only allows optimization of the control-loop behavior
but also provides a DC-coupled and AC-filtered closed-loop
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