LTC3839 Datasheet, PDF (30/50 Pages) Linear Technology – Fast, Accurate, 2-Phase, Single-Output Step-Down DC/DC Controller

LTC3839
APPLICATIONS INFORMATION
conditions of the switching regulator. One of the factors that
contributes to this discrepancy is the characteristics of the
power MOSFETs. For example, if the top power MOSFET’s
turn-on delay is much smaller than the turn-off delay,
the effective on-time will be longer than the TG on-time,
limiting the effective minimum on-time to a larger value.
Light-load operation, in forced continuous mode, will
further elongate the effective on-time due to the dead
times between the “on” states of TG and BG, as shown in
Figure 11. During the dead time from BG turn-off to TG
turn-on, the inductor current flows in the reverse direction,
charging the SW node high before the TG actually turns
on. The reverse current is typically small, causing a slow
rising edge. On the falling edge, after the top FET turns off
and before the bottom FET turns on, the SW node lingers
high for a longer duration due to a smaller peak inductor
current available in light load to pull the SW node low. As
a result of the sluggish SW node rising and falling edges,
the effective on-time is extended and not fully controlled
by the TG on-time. Closer to minimum on-time, this may
cause some phase jitter to appear at light load. As load
current increase, the edges become sharper, and the phase
locking behavior improves.
In continuous mode operation, the minimum on-time limit
imposes a minimum duty cycle of:
D_MIN = f • t_ON(MIN)
where t_ON(MIN) is the effective minimum on-time for the
switching regulator. As the equation shows, reducing the
operating frequency will alleviate the minimum duty cycle
constraint. If the minimum on-time that LTC3839 can
provide is longer than the on-time required by the duty
cycle to maintain the switching frequency, the switching
frequency will have to decrease to maintain the duty cycle,
but the output voltage will still remain in regulation. This is
generally more preferable to skipping cycles and causing
larger ripple at the output, which is typically seen in fixed
frequency switching regulators.
The t_ON(MIN) curves in the Typical Performance Charac-
teristics are measured with minimum load on TG and BG,
at extreme cases of V_IN = 38V, and/or V_OUT = 0.6V, and/
or programmed f = 2MHz (i.e., R_T = 18k). In applications
TG-SW
(V_GS OF TOP
MOSFET)
BG
(V_GS OF
BOTTOM
MOSFET)
DEAD-TIME
DELAYS
I_L 0
V_IN
SW
NEGATIVE
INDUCTOR
CURRENT
IN FCM
3839 F11
DURING BG-TG DEAD TIME,
NEGATIVE INDUCTOR CURRENT
WILL FLOW THROUGH TOP MOSFET’S
BODY DIODE TO PRECHARGE SW NODE
I_L
+– _VIN
DURING TG-BG DEAD TIME,
THE RATE OF SW NODE DISCHARGE
WILL DEPEND ON THE CAPACITANCE
ON THE SW NODE AND INDUCTOR
CURRENT MAGNITUDE
L
L
SW
I_L
TOTAL CAPACITANCE
ON THE SW NODE
Figure 11. Light Loading On-Time Extension for Forced
Continuous Mode Operation
with different V_IN, V_OUT and/or f, the t_ON(MIN) that can
be achieved will generally be larger. Also, to guarantee
frequency and phase locking at light load, sufficient
margin needs to be added to account for the dead times
(t_D(TG/BG) + t_D(TG/BG) in the Electrical Characteristics).
For applications that require relatively low on-time, proper
caution has to be taken when choosing the power MOSFET.
If the gate of the MOSFET is not able to fully turn on due
to insufficient on-time, there could be significant heat dis-
sipation and efficiency loss as a result of larger R_DS(ON).
This may even cause early failure of the power MOSFET.
The minimum off-time is the smallest duration of time
that the TG pin can be turned low and then immediately
turned back high. This minimum off-time includes the
time to turn on the BG (bottom gate) and turn it back off,
plus the dead-time delays from TG off to BG on and from
3839fa
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