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LTC3618 Datasheet, PDF (12/24 Pages) Linear Integrated Systems – Dual 4MHz, 3A Synchronous Buck Converter for DDR Termination
LTC3618
APPLICATIONS INFORMATION
Operating Frequency
Selection of the operating frequency is a trade-off between
efficiency and component size. High frequency operation
allows the use of smaller inductor and capacitor values.
Lower frequencies improves efficiency by reducing internal
gate charge losses but requires larger inductance values
and/or capacitance to maintain low output ripple voltage.
The operating frequency of the LTC3618 is determined
by an external resistor that is connected between the RT
pin and ground. The value of the resistor sets the ramp
current that is used to charge and discharge an internal
timing capacitor within the oscillator and can be calculated
by using the following equation:
RT
=
4
•
1011ΩHz
fOSC
Although frequencies as high as 4MHz are possible, the
minimum on-time of the LTC3618 imposes a minimum
limit on the operating duty cycle. The minimum on-time
is typically 80ns, therefore, the minimum duty cycle is
equal to 80ns • 100% • fOSC(Hz)
Tying the RT pin to SVIN sets the default internal operating
frequency to 2.25MHz.
The minimum on-time also limits the sinking current
capability for high switching frequency applications.
Figure 2 shows the sinking current vs switching frequency
at different input voltages.
–5.0
VTT = 0.9V
–4.5
–4.0
–3.5
–3.0
–2.5
–2.0
–1.5
–1.0
–0.5
0
5VIN
3.3VIN
2.5VIN
0.5
1
1.5
2
2.5
FREQUENCY (MHz)
3618 G03
Figure 2. Sinking Current vs Switching Frequency
VIN
3.3V
47μF
47μF
1μF
RSS
4.7M
CSS
10nF
RC
15.8k
10pF
SVIN (2×) PVIN1 (2×) PVIN2
RUN1
VDDQIN
MODE/SYNC
TRACK/SS1
PGOOD1
1μH
(2×) SW1
ITH1
LTC3618
FB1
CC
470pF
RT, 392k
RT
0.01μF
VTTR
PHASE
1μH
(2×) SW2
FB2
RUN2
PGOOD2
L: VISHAY 1HLP2525BDERIROMO
ITH2 SGND
PGND
3618 F03
R1
845k
R2
422k
VDDQ
1.8V/3A
10pF
47μF
VTT
0.9V/±3A
47μF
Figure 3. Soft-Start and Compensation for VDDQ Externally Programmed,
Compensation for VTT Internally Programmed
3618fb
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