LTC3618 Datasheet, PDF (1/24 Pages) Linear Integrated Systems – Dual 4MHz, 3A Synchronous Buck Converter for DDR Termination

LTC3618
Dual 4MHz, ±3A
Synchronous Buck Converter
for DDR Termination
FEATURES
DESCRIPTION
n _{DDR Power Supply, Termination and Reference}
n _{High Efficiency: Up to 94%}
n _{Dual Outputs with ±3A Output Current Capability}
n _{2.25V to 5.5V Input Voltage Range}
n _{±1% Output Voltage Accuracy}
n _{VTT Output Voltage Down to 0.5V}
n _{Shutdown Current ≤1μA}
n _{VTTR = VDDQIN/2, VFB2 = VTTR}
n _{Adjustable Switching Frequency Up to 4MHz}
n _{Internal or External Compensation}
n _{Selectable 0°/90°/180° Phase Shift Between Channels}
n _{Internal or External Soft-Start for VDDQ, Internal}
Soft-Start for V_TT
n _{Power Good Status Outputs}
n _{Low Profile 4mm × 4mm QFN-24 and TSSOP-24}
Packages
APPLICATIONS
n _{DDR Memory}
n _{Supports DDR, DDR2, and DDR3 Standards}
n _{Tracking Supplies}
The LTC^®3618 is a dual synchronous step-down regulator
using a current mode, constant-frequency architecture. It
provides a complete DDR solution with an input voltage
range from 2.25V to 5.5V.
The output of the first step-down regulator offers a high
accuracy V_DDQ supply. A buffered reference generates VTTR
at 50% of VDDQIN and drives loads up to ±10mA. The
second regulator generates the DDR termination voltage
(V_TT) equal to VTTR. Both regulators are capable of deliv-
ering ±3A of load current at 1MHz switching frequency.
The operating frequency is externally programmable up to
4MHz, allowing the use of small surface mount inductors.
0°, 90°, or 180° of phase shift between the two channels
can be selected to minimize input current ripple. For
switching noise-sensitive applications, the LTC3618 can
be synchronized to an external clock up to 4MHz.
The LTC3618 is offered in leadless 24-pin 4mm × 4mm
QFN and thermally enhanced 24-pin TSSOP packages.
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents, including 5481178, 6498466, 6580258, 6611131.
TYPICAL APPLICATION
V_IN
3.3V
100μF
SV_IN PV_IN1 PV_IN2
RUN1
VDDQIN
1μH
TRACK/SS1
SW1
PGOOD1
ITH1
LTC3618 _FB1
RT
392k
MODE/SYNC
1μH
PHASE
SW2
RUN2
PGOOD2
FB2
V_REF
=
V_DDQ
2
0.01μF
ITH2
VTTR
SGND
PGND
3618 TA01a
422k
210k
V_DDQ
1.8V/3A
47μF
V_TT
0.9V/±3A
47μF
Efficiency and Power Loss vs Load Current
100
90
80
70
60
50
40
30
20
10
0
0.01
V_DDQ = 1.8V
V_TT = 0.9V
0.1
1
LOAD CURRENT (A)
10
1
0.1
0.01
10
3618 TA01b
3618fb
1