2096VE Datasheet, PDF (9/12 Pages) Lattice Semiconductor – 3.3V In-System Programmable SuperFAST™ High Density PLD

Specifications ispLSI 2096VE
Power Consumption
Power consumption in the ispLSI 2096VE device de- used. Figure 3 shows the relationship between power
pends on two primary factors: the speed at which the and operating speed.
device is operating and the number of Product Terms
Figure 3. Typical Device Power Consumption vs fmax
240
220
ispLSI 2096VE
200
180
160
140
120
0
50
100
150
200
fmax (MHz)
Notes: Configuration of six 16-bit counters
Typical current at 3.3V, 25° C
ICC can be estimated for the ispLSI 2096VE using the following equation:
ICC (mA) = 8.0 + (# of PTs * 0.63) + (# of Nets * Max Freq * 0.005)
Where:
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max freq = Highest Clock Frequency to the device (in MHz)
The ICC estimate is based on typical conditions (VCC = 3.3V, room temperature) and an assumption of two
GLB loads on average exists. These values are for estimates only. Since the value of ICC is sensitive to
operating conditions and the program in the device, the actual ICC should be verified.
0127/2096VE
9