2096VE Datasheet, PDF (10/12 Pages) Lattice Semiconductor – 3.3V In-System Programmable SuperFAST™ High Density PLD

Specifications ispLSI 2096VE
Pin Description
NAME
I/O 0 - I/O 5
I/O 6 - I/O 11
I/O 12 - I/O 17
I/O 18 - I/O 23
I/O 24 - I/O 29
I/O 30 - I/O 35
I/O 36 - I/O 41
I/O 42 - I/O 47
I/O 48 - I/O 53
I/O 54 - I/O 59
I/O 60 - I/O 65
I/O 66 - I/O 71
I/O 72 - I/O 77
I/O 78 - I/O 83
I/O 84 - I/O 89
I/O 90 - I/O 95
TQFP PIN NUMBERS
21, 22, 23, 24, 25,
27, 28, 29, 30, 32,
35, 36, 37, 38, 39,
41, 42, 43, 44, 45,
51, 52, 53, 54, 55,
57, 58, 59, 60, 61,
64, 65, 67, 68, 69,
71, 72, 73, 74, 75,
85, 86, 87, 88, 89,
91, 92, 93, 94, 96,
99, 100, 101, 102, 103,
105, 106, 107, 108, 109,
115, 116, 117, 118, 119,
121, 122, 123, 124, 125,
128, 1,
3,
4,
5,
7, 8,
9, 10, 11,
DESCRIPTION
26 Input/Output Pins - These are the general purpose I/O pins used by the
33 logic array.
40
46
56
62
70
76
90
97
104
110
120
126
6
12
GOE 0, GOE 1
80, 17
Global Output Enables input pins.
IN 4, IN 5
BSCAN
TDI/IN 0
TMS/IN 1
TDO/IN 2
TCK/IN 3
84, 113
19
20
48
112
77
Dedicated input pins to the device.
Input — Dedicated in-system programming Boundary Scan enable input
pin. This pin is brought low to enable the programming mode. The TMS,
TDI, TDO and TCK controls become active.
Input — This pin performs two functions. When BSCAN is logic low, it
functions as a serial data input pin to load programming data into the
device. When BSCAN is high, it functions as a dedicated input pin.
Input — This pin performs two functions. When BSCAN is logic low, it
functions as a mode control pin for the Boundary Scan state machine.
When BSCAN is high, it functions as a dedicated input pin.
Output/Input — This pin performs two functions. When BSCAN is logic
low, it functions as an output pin to read serial shift register data. When
BSCAN is high, it functions as a dedicated input pin.
Input — This pin performs two functions. When BSCAN is logic low, it
functions as a clock pin for the Boundary Scan state machine. When
BSCAN is high, it functions as a dedicated input pin.
RESET
Y0, Y1, Y2
15
14 83, 78
Active Low (0) Reset pin which resets all of the registers in the device.
Dedicated Clock input. This clock input is connected to one of the clock
inputs of all the GLBs on the device.
GND
VCC
NC¹
18, 34, 50, 63, 79, 98, Ground (GND)
111, 127
2, 16, 31, 47, 66, 81, _VCC
95, 114
13, 49, 82
No Connect.
1. NC pins are not to be connected to any active signal, VCC or GND.
Table 2-0002-2096VE
10