2096VE Datasheet, PDF (4/12 Pages) Lattice Semiconductor – 3.3V In-System Programmable SuperFAST™ High Density PLD

Specifications ispLSI 2096VE
Switching Test Conditions
Input Pulse Levels
GND to 3.0V
Input Rise and Fall Time
≤ 1.5ns 10% to 90%
Input Timing Reference Levels
1.5V
Output Timing Reference Levels
1.5V
Output Load
See Figure 2
3-state levels are measured 0.5V from
steady-state active level.
Table 2-0003/2096VE
Output Load Conditions (see Figure 2)
Figure 2. Test Load
+ 3.3V
R1
Device
Output
R2
Test
Point
CL*
TEST CONDITION
A
Active High
B
Active Low
Active High to Z
C
at V_OH -0.5V
Active Low to Z
at V_OL+0.5V
R1
316Ω
∞
316Ω
∞
R2
348Ω
348Ω
348Ω
348Ω
CL
35pF
35pF
35pF
5pF
*CL includes Test Fixture and Probe Capacitance.
0213A/2096VE
316Ω
348Ω 5pF
Table 2-0004/2096VE
DC Electrical Characteristics
Over Recommended Operating Conditions
SYMBOL
PARAMETER
CONDITION
MIN. TYP.³ MAX. UNITS
VOL
Output Low Voltage
I_OL= 8 mA
–
–
0.4
V
VOH
IIL
IIH
IIL-isp
IIL-PU
IOS¹
Output High Voltage
Input or I/O Low Leakage Current
Input or I/O High Leakage Current
BSCAN Input Low Leakage Current
I/O Active Pull-Up Current
Output Short Circuit Current
I_OH = -4 mA
0V ≤ V_IN ≤ V_IL (Max.)
(V_CC – 0.2)V ≤ V_IN ≤ V_CC
V_CC ≤ V_IN ≤ 5.25V
0V ≤ V_IN ≤ V_IL
0V ≤ V_IN ≤ V_IL
V_CC= 3.3V, V_OUT = 0.5V
2.4
–
–
V
–
–
-10 µA
–
–
10
µA
–
–
10
µA
–
– -150 µA
–
– -150 µA
–
– -100 mA
ICC^{2, 4} Operating Power Supply Current
V_IL= 0.0V, V_IH = 3.0V
f_CLOCK = 1 MHz
–
125 –
mA
1. One output at a time for a maximum duration of one second. V_OUT = 0.5V was selected to avoid test
problems by tester ground degradation. Characterized but not 100% tested.
Table 2-0007A/2096VE
2. Measured using six 16-bit counters.
3. Typical values are at V_CC= 3.3V and T_A= 25°C.
4. Maximum I_CC varies widely with specific device configuration and operating frequency. Refer to the Power Consumption
section of this data sheet and Thermal Management section of the Lattice Semiconductor Data Book or CD-ROM to
estimate maximum I_CC .
4