2064VL Datasheet, PDF (9/14 Pages) Lattice Semiconductor – 2.5V In-System Programmable SuperFAST™ High Density PLD

Specifications ispLSI 2064VL
64-I/O Signal Descriptions
Signal Name
Description
RESET
Active Low (0) Reset pin resets all the registers in the device.
GOE 0, GOE1
Global Output Enable input pins.
Y0, Y1, Y2
Dedicated Clock Input – These clock inputs are connected to one of the clock inputs of all the GLBs in
the device.
BSCAN
Input – Dedicated in-system programming Boundary Scan enable input pin. This pin is brought low to
enable the programming mode. The TMS, TDI, TDO and TCK controls become active.
TDI/IN 0
Input – This pin performs two functions. When BSCAN is logic low, it functions as an input pin to load
programming data into the device. When BSCAN is high, it functions as a dedicated input pin.
TCK/IN 3
Input – This pin performs two functions. When BSCAN is logic low, it functions as a clock pin for the
Boundary Scan state machine. When BSCAN is high, it functions as a dedicated input pin.
TMS/IN 1
Input – This pin performs two functions. When BSCAN is logic low, it functions as a mode control pin for
the Boundary Scan state machine. When BSCAN is high, it functions as a dedicated input pin.
TDO/IN 2
Output/Input – This pin performs two functions. When BSCAN is logic low, it functions as an output pin
to read serial shift register data. When BSCAN is high, it functions as a dedicated input pin.
GND
Ground (GND)
VCC
Vcc
NC¹
No Connect
I/O
Input/Output Pins – These are the general purpose I/O pins used by the logic array.
1. NC pins are not to be connected to any active signals, VCC or GND.
32-I/O Signal Descriptions
Signal Name
Description
GOE 0/IN 3
GOE 1/Y0
RESET/Y1
BSCAN
TDI/IN 0
TMS/IN 2
TDO/IN 1
TCK/Y2
GND
VCC
NC¹
I/O
This pin performs one of two functions. It can be programmed to function as a Global Output Enable
pin or a Dedicated Input pin.
This pin performs one of two functions. It can be programmed to function as a Global Output Enable or
a Dedicated Clock input. This clock input is connected to one of the clock inputs of all GLBs on the
device.
This pin performs two functions: (1) Dedicated clock input. This clock input is brought into the Clock
Distribution Network and can optionally be routed to any GLB and/or I/O cell on the device. (2) Active
Low (0) Reset pin which resets all of the registers in the device.
Input – Dedicated in-system programming Boundary Scan Enable input pin. This pin is brought low to
enable the programming mode. The TMS, TDI, TDO and TCK controls become active.
Input – This pin performs two functions. When BSCAN is logic low, it functions as an input pin to load
programming data into the device. TDI/IN0 is also used as one of the two control pins for the ISP State
Machine. When BSCAN is high, it functions as a dedicated input pin.
Input – This pin performs two functions. When BSCAN is logic low, it functions as a pin to control the
operation of the ISP State Machine. When BSCAN is high, it functions as a dedicated input pin.
Output/Input – This pin performs two functions. When BSCAN is logic low, it functions as an output pin
pin to read serial shift register data. When BSCAN is high, it functions as a dedicated input pin.
Input – This pin performs two functions. When BSCAN is logic low, it functions as a clock pin for the
Serial Shift Register. When BSCAN is high, it functions as a dedicated clock input. This clock input is
brought into the Clock Distribution Network and can optionally be routed to any GLB and/or I/O cell on
the device.
Ground (GND)
Vcc
No Connect
Input/Output pins – These are the general purpose I/O pins used by the logic array.
1. NC pins are not to be connected to any active signals, VCC or GND.
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