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2064VL Datasheet, PDF (4/14 Pages) Lattice Semiconductor – 2.5V In-System Programmable SuperFAST™ High Density PLD
Specifications ispLSI 2064VL
Switching Test Conditions
Input Pulse Levels
GND to VCC
Input Rise and Fall Time
≤ 1.5 ns 10% to 90%
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
VCC/2
VCC/2
See Figure 2
3-state levels are measured 0.15V from
steady-state active level.
Table 2-0003/2064VL
Output Load Conditions (see Figure 2)
Figure 2. Test Load
Device
Output
VCC
R1
R2
Test
Point
CL*
TEST CONDITION
A
Active High
B
Active Low
Active High to Z
C
at VOH -0.15V
Active Low to Z
at VOL+0.15V
R1
250Ω
∞
250Ω
∞
R2
218Ω
218Ω
∞
218Ω
CL
35pF
35pF
35pF
5pF
250Ω
∞
5pF
Table 2-0004/2064VL
*CL includes Test Fixture and Probe Capacitance.
0213A/2064VL
DC Electrical Characteristics
Over Recommended Operating Conditions
SYMBOL
PARAMETER
CONDITION
MIN. TYP.3 MAX. UNITS
VOL
Output Low Voltage
IOL = 100µA
IOL = 8mA
—
— 0.2
V
—
— 0.4
V
IOH = -100µA
VCC - 0.2 —
—
V
VOH
Output High Voltage
IOH = -1mA
2.0
—
—
V
IOH = -4mA
1.8
—
—
V
IIL5
Input or I/O Low Leakage Current
0V ≤ VIN ≤ VIL (Max.)
—
— -10 µA
IIH
IIL-isp
Input or I/O High Leakage Current
BSCAN Input Pull-Up Current
VIH (min) ≤ VIN ≤ 3.6V
0V ≤ VIN ≤ VIL
—
— 10
µA
—
— -150 µA
IIL-PU I/O Active Pull-Up Current
0V ≤ VIN ≤ VIL
—
— -150 µA
IOS1
Output Short Circuit Current
VCC= 2.5V, VOUT= 0.5V
—
— -100 mA
ICC2, 4 Operating Power Supply Current
VIL = 0.0V, VIH = 2.5V
— 60
— mA
fCLK = 1 MHz
1. One output at a time for a maximum duration of one second. VOUT = 0.5V was selected to avoid test
problems by tester ground degradation. Characterized but not 100% tested.
Table 2-0007/2064VL
2. Measured using four 16-bit counters.
3. Typical values are at VCC = 2.5V and TA = 25°C.
4. Maximum ICC varies widely with specific device configuration and operating frequency. Refer to Power Consumption
section of this data sheet and Thermal Management section of the Lattice Semiconductor Data Book or CD-ROM to
estimate maximum ICC.
5. With no pull-up resistors.
4