2064VL Datasheet, PDF (12/14 Pages) Lattice Semiconductor – 2.5V In-System Programmable SuperFAST™ High Density PLD

Pin Configuration
ispLSI 2064VL 100-Pin TQFP Pinout Diagram
Specifications ispLSI 2064VL
I/O 57
1
I/O 58
2
I/O 59
3
1_NC
4
I/O 60
5
I/O 61
6
I/O 62
7
I/O 63
8
1_NC
9
Y0
10
RESET
11
VCC
12
GOE 1
13
GND
14
BSCAN
15
TDI/IN 0
16
I/O 0
17
I/O 1
18
I/O 2
19
I/O 3
20
1_NC
21
I/O 4
22
I/O 5
23
I/O 6
24
1_NC
25
ispLSI 2064VL
Top View
75
NC¹
74
I/O 38
73
I/O 37
72
I/O 36
71
NC¹
70
I/O 35
69
I/O 34
68
I/O 33
67
I/O 32
66
NC¹
65
Y1
64
NC¹
63
VCC
62
GOE 0
61
GND
60
Y2
59
TCK/IN 3
58
I/O 31
57
I/O 30
56
I/O 29
55
I/O 28
54
NC¹
53
I/O 27
52
I/O 26
51
I/O 25
1. NC pins are not to be connected to any active signals, VCC or GND.
100 TQFP/2064VL
12