2096E_1 Datasheet, PDF (8/11 Pages) Lattice Semiconductor – In-System Programmable SuperFAST™ High Density PLD

Specifications ispLSI 2096E
Power Consumption
Power consumption in the ispLSI 2096E device depends Figure 3 shows the relationship between power and
on two primary factors: the speed at which the device is operating speed.
operating and the number of Product Terms used.
Figure 3. Typical Device Power Consumption vs fmax
350
ispLSI 2096E
325
300
275
250
225
200
175
150
125
0 20 40 60 80 100 120 140 160 180
fmax (MHz)
Notes: Configuration of six 16-bit counters
Typical current at 5V, 25° C
ICC can be estimated for the ispLSI 2096E using the following equation:
ICC = 5.5 + (# of PTs _* 0.67) + (# of nets _* max freq _* 0.0047)
Where:
# of PTs = Number of Product Terms used in design
# of nets = Number of Signals used in device
Max freq = Highest Clock Frequency to the device (in MHz)
The ICC estimate is based on typical conditions (VCC = 5.0V, room temperature) and an assumption of two GLB loads
on average exists. These values are for estimates only. Since the value of ICC is sensitive to operating conditions
and the program in the device, the actual ICC should be verified.
0127/2096E
8