1048EA Datasheet, PDF (7/14 Pages) Lattice Semiconductor – In-System Programmable High Density PLD

Specifications ispLSI 1048EA
Internal Timing Parameters¹
PARAMETER #²
DESCRIPTION
Inputs
tiobp
tiolat
tiosu
tioh
tioco
tior
tdin
22 I/O Register Bypass
23 I/O Latch Delay
24 I/O Register Setup Time before Clock
25 I/O Register Hold Time after Clock
26 I/O Register Clock to Out Delay
27 I/O Register Reset to Out Delay
28 Dedicated Input Delay
GRP
tgrp1
29 GRP Delay, 1 GLB Load
tgrp4
tgrp8
tgrp16
tgrp48
30 GRP Delay, 4 GLB Loads
31 GRP Delay, 8 GLB Loads
32 GRP Delay, 16 GLB Loads
33 GRP Delay, 48 GLB Loads
GLB
t4ptbpc
t4ptbpr
34 4 Product Term Bypass Path Delay (Combinatorial)
35 4 Product Term Bypass Path Delay (Registered)
t1ptxor
t20ptxor
txoradj
tgbp
36 1 Product Term/XOR Path Delay
37 20 Product Term/XOR Path Delay
38 XOR Adjacent Path Delay ³
39 GLB Register Bypass Delay
tgsu
tgh
40 GLB Register Setup Time before Clock
41 GLB Register Hold Time after Clock
tgco
tgro
tptre
tptoe
tptck
tgfb
42 GLB Register Clock to Output Delay
43 GLB Register Reset to Output Delay
44 GLB Product Term Reset to Register Delay
45 GLB Product Term Output Enable to I/O Cell Delay
46 GLB Product Term Clock Delay
47 GLB Feedback Delay
ORP
torp
torpbp
48 ORP Delay
49 ORP Bypass Delay
1. Internal Timing Parameters are not tested and are for reference only.
2. Refer to Timing Model in this data sheet for further details.
3. The XOR adjacent path can only be used by hard macros.
-170
-125
-100
UNITS
MIN. MAX. MIN. MAX. MIN. MAX.
— 0.3 — 0.3 — 0.4 ns
— 4.0 — 4.0 — 4.0 ns
3.0 — 3.0 — 3.4 — ns
0.0 — 0.0 — 0.0 — ns
— 4.6 — 4.6 — 5.0 ns
— 4.6 — 4.6 — 5.0 ns
— 1.8 — 1.9 — 2.2 ns
— 1.4 — 1.7 — 2.1 ns
— 1.6 — 1.9 — 2.3 ns
— 1.8 — 2.1 — 2.5 ns
— 2.2 — 2.5 — 2.9 ns
— 3.8 — 4.1 — 4.5 ns
— 2.1 — 3.4 — 4.9 ns
— 2.0 — 3.1 — 4.9 ns
— 2.3 — 3.6 — 4.3 ns
— 2.2 — 3.6 — 4.3 ns
— 2.2 — 3.6 — 4.3 ns
— 1.0 — 1.2 — 2.1 ns
0.3 — 0.3 — 0.3 — ns
2.0 — 3.5 — 4.8 — ns
— 1.4 — 1.4 — 1.7 ns
— 4.7 — 4.9 — 5.0 ns
— 2.7 — 3.8 — 4.5 ns
— 3.6 — 5.2 — 7.2 ns
1.7 2.7 2.8 3.9 3.5 4.7 ns
— 0.1 — 0.6 — 1.4 ns
— 1.0
— 0.1
— 1.3
— 0.2
— 1.4 ns
— 0.4 ns
Table 2-0036A/1048EA
v.2.0
7