GAL16V8 Datasheet, PDF (12/22 Pages) Lattice Semiconductor – High Performance E2CMOS PLD Generic Array Logic

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AC Switching Characteristics
Over Recommended Operating Conditions
TEST
PARAM. _COND1.
DESCRIPTION
tpd
A Input or I/O to Comb. Output
tco
A Clock to Output Delay
tcf²
— Clock to Feedback Delay
tsu
— Setup Time, Input or Fdbk before Clk↑
th
— Hold Time, Input or Fdbk after Clk↑
A Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
COM / IND COM / IND
IND
COM / IND
-10
-15
-20
-25
UNITS
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
3 10 3 15 3 20 3 25 ns
2 7 2 10 2 11 2 12 ns
— 6 — 8 — 9 — 10 ns
7.5 — 12 — 13 — 15 — ns
0 — 0 — 0 — 0 — ns
66.7 — 45.5 — 41.6 — 37 — MHz
fmax³
A
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
71.4 — 50 — 45.4 — 40 — MHz
A Maximum Clock Frequency with
No Feedback
83.3 — 62.5 — 50 — 41.6 — MHz
twh
— Clock Pulse Duration, High
twl
— Clock Pulse Duration, Low
ten
B Input or I/O to Output Enabled
t
B OE to Output Enabled
tdis
C Input or I/O to Output Disabled
t
C OE to Output Disabled
6 — 8 — 10 — 12 — ns
6 — 8 — 10 — 12 — ns
1 10 — 15 — 18 — 20 ns
1 10 — 15 — 18 — 20 ns
1 10 — 15 — 18 — 20 ns
1 10 — 15 — 18 — 20 ns
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Descriptions section.
3) Refer to fmax Descriptions section. Characterized but not 100% tested.
Capacitance (T_A = 25°C, f = 1.0 MHz)
SYMBOL
PARAMETER
C_I
Input Capacitance
C
I/O Capacitance
I/O
*Characterized but not 100% tested.
MAXIMUM*
8
8
UNITS
pF
pF
TEST CONDITIONS
V_CC = 5.0V, V_I = 2.0V
V = 5.0V, V = 2.0V
CC
I/O
12