GAL16V8 Datasheet, PDF (11/22 Pages) Lattice Semiconductor – High Performance E2CMOS PLD Generic Array Logic

Specifications GAL16V8D
AC Switching Characteristics
Over Recommended Operating Conditions
TEST
PARAMETER _COND1.
DESCRIPTION
tpd
A
Input or I/O to Comb. Output
tco
A
Clock to Output Delay
tcf²
— Clock to Feedback Delay
tsu
— Setup Time, Input or Feedback before Clock↑
th
— Hold Time, Input or Feedback after Clock↑
A
Maximum Clock Frequency with
External Feedback, 1/(tsu + tco)
COM
COM COM / IND
-3
-5
-7
UNITS
MIN. MAX. MIN. MAX. MIN. MAX.
1 3.5 1 5 1 7.5 ns
1 3 1 4 1 5 ns
— 2.5 — 3 — 3 ns
2.5 — 3 — 5 — ns
0 — 0 — 0 — ns
182 — 142.8 — 100 — MHz
fmax³
A
Maximum Clock Frequency with
Internal Feedback, 1/(tsu + tcf)
200 — 166 — 125 — MHz
A
Maximum Clock Frequency with
No Feedback
250 — 166 — 125 — MHz
twh
— Clock Pulse Duration, High
2 ⁴ — 3 ⁴ — 4 — ns
twl
— Clock Pulse Duration, Low
2 ⁴ — 3 ⁴ — 4 — ns
ten
B
Input or I/O to Output Enabled
B
OE to Output Enabled
— 4.5 1 6 1 9 ns
— 4.5 1 6 1 6 ns
tdis
C
Input or I/O to Output Disabled
C
OE to Output Disabled
— 4.5 1 5 1 9 ns
— 4.5 1 5 1 6 ns
1) Refer to Switching Test Conditions section.
2) Calculated from fmax with internal feedback. Refer to fmax Descriptions section.
3) Refer to fmax Descriptions section. Characterized but not 100% tested.
4) Characterized but not 100% tested.
Capacitance (T_A = 25°C, f = 1.0 MHz)
SYMBOL
PARAMETER
C_I
Input Capacitance
C_I/O
I/O Capacitance
*Characterized but not 100% tested.
MAXIMUM*
8
8
UNITS
pF
pF
TEST CONDITIONS
V_CC = 5.0V, V_I = 2.0V
V_CC = 5.0V, V_I/O = 2.0V
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