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CA064X104K4GACTU Datasheet, PDF (14/18 Pages) Kemet Corporation – Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
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Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Capacitor Array, C0G Dielectric, 10 – 200 VDC, (Commercial & Automotive Grade)
Figure 2 – Punched (Paper) Carrier Tape Dimensions
T
ØDo
Po
[10 pitches cumulative
tolerance on tape ± 0.2 mm]
E1
Bottom Cover Tape
A0
B0
F
W
E2
T1
T1
Top Cover Tape
P1
Center Lines of Cavity
User Direction of Unreeling
G
Cavity Size,
See
Note 1, Table 7
Bottom Cover Tape
Table 7 – Punched (Paper) Carrier Tape Dimensions
Metric will govern
Tape Size
8 mm
Tape Size
8 mm
8 mm
D0
1.5 +0.10 -0.0
(0.059 +0.004 -0.0)
Pitch
Half (2 mm)
Single (4 mm)
Constant Dimensions — Millimeters (Inches)
E1
1.75 ±0.10
(0.069 ±0.004)
P0
4.0 ±0.10
(0.157 ±0.004)
P2
2.0 ±0.05
(0.079 ±0.002)
T1 Maximum
0.10
(0.004)
Maximum
Variable Dimensions — Millimeters (Inches)
E2 Minimum
6.25
(0.246)
F
3.5 ±0.05
(0.138 ±0.002)
P1
2.0 ±0.05
(0.079 ±0.002)
4.0 ±0.10
(0.157 ±0.004)
T Maximum
1.1
(0.098)
G Minimum
0.75
(0.030)
W Maximum
8.3
(0.327)
8.3
(0.327)
R Reference
Note 2
25
(0.984)
A0 B0
Note 1
1. The cavity defined by A0, B0 and T shall surround the component with sufficient clearance that:
a) the component does not protrude beyond either surface of the carrier tape.
b) the component can be removed from the cavity in a vertical direction without mechanical restriction, after the top cover tape has been removed.
c) rotation of the component is limited to 20° maximum (see Figure 3).
d) lateral movement of the component is restricted to 0.5 mm maximum (see Figure 4).
e) see Addendum in EIA Standard 481 for standards relating to more precise taping requirements.
2. The tape with or without components shall pass around R without damage (see Figure 6).
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 • 864-963-6300 • www.kemet.com
C1016_C0G_ARRAY_SMD • 10/14/2016 14
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