813N252DI-02 Datasheet, PDF (14/23 Pages) Integrated Device Technology – Jitter Attenuator & FemtoClock NG Multiplier

813N252DI-02 DATA SHEET
Jitter Attenuator EXTERNAL COMPONENTS
Choosing the correct external components and having a proper
printed circuit board (PCB) layout is a key task for quality operation of
the Jitter Attenuator. In choosing a crystal, special precaution must
be taken with load capacitance (C_L), frequency accuracy and
temperature range.
The crystal’s C_L characteristic determines its resonating frequency
and is closely related to the center tuning of the crystal. The total
external capacitance (C_EXTERNAL) seen by the crystal when installed
on a PCB is the sum of the stray board capacitance, IC package lead
capacitance, internal device capacitance and any installed tuning
capacitors (C_TUNE). The recommended C_Lin the Crystal Parameter
Table balances the tuning range by centering the tuning curve for a
typical PCB. If the crystal C_L is greater than the total external
capacitance (C_L > C_EXTERNAL), the crystal will oscillate at a higher
frequency than the specification. If the crystal C_L is lower than the
total external capacitance (C_L < C_EXTERNAL), the crystal will oscillate
at a lower frequency than the specification. Mismatches between C_L
and C_EXTERNAL require adjustments in C_TUNE in order to center the
tuning curve. For example, given a board with 5pF of stray
capacitance, C_TUNE would be 0. In addition, the frequency accuracy
specification in the Crystal Characteristics Table are used to
calculate the APR (Absolute Pull Range). It is recommended that the
crystal C_L not to exceed the value stated in the Crystal Parameter
Table because it can lead to a reduced APR
.
LF0
LF1
ISET
R_S R_SET
C_P C_S
C_TUNE
27MHz
C_TUNE
XTAL_IN
XTAL_OUT
Crystal Characteristics
Symbol Parameter
Mode of Oscillation
f_N
Frequency
f_T
Frequency Tolerance
f_S
Frequency Stability
Operating Temperature Range
C_L
C_O
ESR
Load Capacitance
Shunt Capacitance
Equivalent Series Resistance
Drive Level
Aging @ 25 ⁰C
Test Conditions
First Year
Minimum
-40
Typical
Fundamental
27
10
4
100
Maximum
±20
±20
+85
40
1
±3
Units
MHz
ppm
ppm
0_C
pF
pF

µW
ppm
The VCXO-PLL Loop Bandwidth Selection Table shows R_S, C_S,C_P
and R_SET values for recommended high, mid and low loop bandwidth
configurations. The device has been characterized using these
parameters. In addition, the digital VCXO gain (k_VCXO) has been
provided for additional loop filter requirements.
Jitter Attenuator Characteristics Table
Symbol Parameter
Typical
Units
k_VCXO
VCXO Gain
2.6
kHz/V
Jitter Attenuator Loop Bandwidth Selection Table
Bandwidth
7Hz (Low)
Crystal Frequency
27MHz
R_S (k)
110
35Hz (Mid)
27MHz
365
45Hz (High)
27MHz
470
C_S (µF)
10
1
1
C_P (µF)
0.01
0.002
0.0005
R_SET (k)
2.21
1.5
1.5
The crystal and external loop filter components should be kept as
close as possible to the device. Loop filter and crystal traces should
be kept short and separated from each other. Other signal traces
should be kept separate and not run underneath the device, loop filter
or crystal components.
REVISION 1 08/14/15
14
JITTER ATTENUATOR & FEMTOCLOCK NG^® MULTIPLIER