CPC75282 Datasheet, PDF (8/19 Pages) Clare, Inc. – Line Card Access Switch

INTEGRATED CIRCUITS DIVISION
PRELIMINARY
1.7.4 Test Switches, SW5 and SW6
Parameter
Test Conditions
V_SW1 (differential) = T_LINE to T_BAT
V_SW2 (differential) = R_LINE to R_BAT
All-Off state.
Off-State
Leakage Current
+25C,
V_SW (differential) = -320V to gnd
V_SW (differential) = +260V to -60V
+85 C,
V_SW (differential) = -330V to gnd
V_SW (differential) = +270V to -60V
-40 C,
V_SW (differential) = -310V to gnd
V_SW (differential) = +250V to -60V
I_SW(on) = ±10mA, ±40mA,
R_BAT and T_BAT = -2V
On Resistance
+25C
+85C
-40C
V_SW (on) = ±10V, +25C
DC current limit
V_SW (on) = ±10V, +85C
V_SW (on) = ±10V, -40C
Dynamic current limit
(t = <0.5 s)
Break switches on, all other switches
off. Apply ±1kV 10x1000 s pulse with
appropriate protection in place.
+25C, OFF_x = 0,
V_SW (T_LINE, R_LINE) = ±320V
Logic Input to Switch ^{+85C, OFF}x ^{= 0,}
Output Isolation
V_SW (T_LINE, R_LINE) = ±330V
-40C, OFF_x = 0,
V_SW (T_LINE, R_LINE) = ±310V
Transient Immunity ¹
-
1 _{Applied voltage is 100VP-P square wave at 100Hz.}
Symbol
I_SW
R_ON
I_SW
I_SW
I_SW
dV/dt
Minimum
-
-
-
80
-
-
-
-
-
1500
Typical
-
-
-
38
46
28
175
110
210
2.5
-
-
-
2100
CPC75282
Maximum
Unit
1
A
-
70

-
-
mA
250
-
A
1
A
-
V/s
8
PRELIMINARY
R00E