IS64LV51216 Datasheet, PDF (9/15 Pages) Integrated Silicon Solution, Inc – 512K x 16 HIGH SPEED ASYNCHRONOUS CMOS STATIC RAM WITH 3.3V SUPPLY

IS61LV51216
IS64LV51216
ISSI ^®
AC WAVEFORMS
WRITE CYCLE NO. 1 (CE Controlled, OE is HIGH or LOW) ^{(1 )}
1
t WC
ADDRESS
VALID ADDRESS
2
t SA
t SCE
t HA
CE
t AW
3
t PWE1
WE
t PWE2
t PBW
4
UB, LB
t HZWE
t LZWE
DOUT
DATA UNDEFINED
HIGH-Z
5
t SD
t HD
DIN
DATAIN VALID
UB_CEWR1.eps
6
Notes:
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs
and at least one of the LB and UB inputs being in the LOW state.
7
2. WRITE = (CE) [ (LB) = (UB) ] (WE).
8
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10
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Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
9
Rev. D
12/06/05