IS62WV102416ALL Datasheet, PDF (9/17 Pages) Integrated Silicon Solution, Inc – 1M x 16 HIGH-SPEED LOW POWER ASYNCHRONOUS CMOS STATIC RAM

IS62WV102416ALL
IS62WV102416BLL
IS65WV102416BLL
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol
Parameter
25 ns
35 ns
Min. Max.
Min. Max.
Unit
tRC
Read Cycle Time
25
—
35
—
ns
tAA
Address Access Time
—
25
—
35
ns
tOHA
Output Hold Time
3
—
3
—
ns
tACS1/tACS2
CS1/CS2 Access Time
—
25
—
35
ns
tDOE
OE Access Time
—
12
—
15
ns
tHZOE⁽²⁾
OE to High-Z Output
—
8
—
10
ns
tLZOE⁽²⁾
OE to Low-Z Output
5
—
5
—
ns
t t HZCS1/ HZCS2⁽²⁾ CS1/CS2 to High-Z Output
0
8
0
10
ns
t t LZCS1/ LZCS2⁽²⁾ CS1/CS2 to Low-Z Output
10
—
10
—
ns
tBA
LB, UB Access Time
—
25
—
35
ns
tHZB
LB, UB to High-Z Output
0
8
0
10
ns
tLZB
LB, UB to Low-Z Output
0
—
0
—
ns
Notes:
1. Testconditionsassumesignaltransitiontimesof5nsorless,timingreferencelevelsof0.9V/1.5V,inputpulselevelsof0.4toVDD-0.2V/0.4VtoVDD-0.3Vand
output loading specified in Figure 1.
2. TestedwiththeloadinFigure2.Transitionismeasured±500mVfromsteady-statevoltage.Not100%tested.
AC WAVEFORMS
READ CYCLE NO. 1^(1,2) (Address Controlled) (CS1 = OE = VIL, CS2 = WE = VIH, UB or LB = VIL)
ADDRESS
DQ0-D15
tRC
tAA
tOHA
PREVIOUS DATA VALID
tOHA
DATA VALID
Integrated Silicon Solution, Inc. — www.issi.com
9
Rev. A
01/18/08