IS62C25616BL Datasheet, PDF (8/13 Pages) Integrated Silicon Solution, Inc – 256K x 16 HIGH-SPEED CMOS STATIC RAM

IS62C25616BL, IS65C25616BL
AC WAVEFORMS
WRITE CYCLE NO. 1 (WE Controlled)^(1,2)
t WC
ADDRESS
t SA
CE
WE
VALID ADDRESS
t SCE
t HA
t AW
t PWE1
t PWE2
t PBW
UB, LB
DOUT
DATA UNDEFINED
t HZWE
HIGH-Z
t LZWE
t SD
t HD
DIN
DATAIN VALID
UB_CEWR1.eps
Notes:
1. WRITE is an internally generated signal asserted during an overlap of the LOW states on the CE and WE inputs and at least
one of the LB and UB inputs being in the LOW state.
2. WRITE = (CE) [ (LB) = (UB) ] (WE).
8 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev.  A
06/28/2011