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IS62C25616BL Datasheet, PDF (6/13 Pages) Integrated Silicon Solution, Inc – 256K x 16 HIGH-SPEED CMOS STATIC RAM
IS62C25616BL, IS65C25616BL
AC WAVEFORMS
READ CYCLE NO. 1(1,2) (Address Controlled) (CE = OE = Vil, UB or LB = Vil)
t RC
ADDRESS
DOUT
t AA
t OHA
PREVIOUS DATA VALID
t OHA
DATA VALID
READ1.eps
READ CYCLE NO. 2(1,3) (CE,OE and UB/LB Controlled)
t RC
ADDRESS
t AA
OE
CE
LB, UB
t LZCE
DOUT
t LZB
HIGH-Z
t DOE
t LZOE
t ACE
t BA
t HZCE
DATA VALID
Notes:
1. WE is HIGH for a Read Cycle.
2. The device is continuously selected. OE, CE, UB, or LB = Vil.
3. Address is valid prior to or coincident with CE LOW transition.
t OHA
t HZOE
t HZB
UB_CEDR2.eps
6 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev.  A
06/28/2011