IS62WV1288ALL Datasheet, PDF (6/15 Pages) Integrated Silicon Solution, Inc – 128K x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM

IS62WV1288ALL, IS62WV1288BLL
ISSI ^®
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol
Parameter
45 ns
55 ns
70 ns
Min. Max.
Min. Max.
Min. Max.
Unit
tRC
Read Cycle Time
45 —
55 —
70 —
ns
tAA
Address Access Time
— 45
— 55
— 70
ns
tOHA
Output Hold Time
10 —
10 —
10 —
ns
tACS1/tACS2
CS1/CS2 Access Time
— 45
— 55
— 70
ns
tDOE
OE Access Time
— 20
— 25
— 35
ns
tHZOE⁽²⁾
OE to High-Z Output
0 15
0 20
0
25
ns
tLZOE⁽²⁾
OE to Low-Z Output
5—
5—
5
—
ns
t t HZCS1/ HZCS2⁽²⁾ CS1/CS2toHigh-ZOutput
0 15
0 20
0
25
ns
t t LZCS1/ LZCS2⁽²⁾
CS1/CS2 to Low-Z Output
5—
10 —
10 —
ns
Notes:
1. Test conditions assume signal transition times of 5 ns or less, timing reference levels of 0.9V/1.5V, input pulse levels of 0.4 to
VDD-0.2V/VDD-0.3V and output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
AC WAVEFORMS
READ CYCLE NO. 1^(1,2) (Address Controlled) (CS1 = OE = VIL, CS2 = WE = VIH)
ADDRESS
DOUT
tRC
tAA
tOHA
PREVIOUS DATA VALID
tOHA
DATA VALID
6
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. C
06/20/05