IS62LV256AL Datasheet, PDF (5/14 Pages) Integrated Silicon Solution, Inc – 32K x 8 LOW VOLTAGE CMOS STATIC RAM

IS65LV256AL
IS62LV256AL
ISSI ^®
READ CYCLE SWITCHING CHARACTERISTICS⁽¹⁾ (Over Operating Range)
Symbol
Parameter
-20 ns
-45 ns
Min. Max.
Min. Max.
Unit
tRC
Read Cycle Time
20 —
45 —
ns
tAA
Address Access Time
— 20
— 45
ns
tOHA
Output Hold Time
2—
2—
ns
tACE
CE Access Time
— 20
— 45
ns
tDOE
OE Access Time
— 10
— 25
ns
tLZOE⁽²⁾
OE to Low-Z Output
0—
0—
ns
tHZOE⁽²⁾
OE to High-Z Output
—9
0 20
ns
tLZCE⁽²⁾
CE to Low-Z Output
3—
3—
ns
tHZCE⁽²⁾
CE to High-Z Output
—9
0 20
ns
tPU⁽³⁾
CE to Power-Up
0—
0—
ns
tPD⁽³⁾
CE to Power-Down
— 18
— 30
ns
Notes:
1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V and
output loading specified in Figure 1.
2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.
3. Not 100% tested.
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Levels
Output Load
Unit
0V to 3.0V
3 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
3.3V
635 Ω
OUTPUT
30 pF
Including
jig and
scope
Figure 1.
702 Ω
3.3V
635 Ω
OUTPUT
5 pF
Including
jig and
scope
Figure 2.
702 Ω
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
5
Rev. A
03/17/06