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IS66WVE2M16ALL Datasheet, PDF (19/30 Pages) Integrated Silicon Solution, Inc – Asynchronous and page mode interface
IS66WVE2M16ALL
IS67WVE2M16ALL
Table 6. Deep Power-Down Specifications
Description
Deep Power-Down
Conditions
VIN=VDDQ or 0V; +25°C
ZZ# = 0V, CR[4] = 0
Symbol
Izz
TYP
3
MAX
10
Unit
uA
Table 7. Capacitance
Description
Input Capacitance
Input/Output Capacitance (DQ)
Conditions
TC=+25°C;
f=1Mhz;
VIN=0V
Symbol
CIN
CIO
MIN
2.0
3.5
MAX
6.5
6.5
Unit
pF
pF
Note
1
1
Notes:
1. These parameters are verified in device characterization and are not 100% tested.
Figure 8. AC Input/Output Reference Waveform
VDDQ
∫∫
VDDQ/22 Input1
Test Points
VDDQ/23 Output
VSS
∫∫
Notes:
1. AC test inputs are driven at VDDQ for a logic 1 and VSS for a logic 0. Input rise and fall times
(10% to 90%) < 1.6ns.
2. Input timing begins at VDDQ/2.
3. Output timing ends at VDDQ/2.
Figure 9. Output Load Circuit
Test Point
50Ω
DUT
30pF
VDDQ/2
Rev. B | Jan. 2012
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