IS62WV12816EALL Datasheet, PDF (12/17 Pages) Integrated Silicon Solution, Inc – Three state outputs

IS62/65WV12816EALL
IS62/65WV12816EBLL
WRITE CYCLE NO. 4 ( & CONTROLLED)
ADDRESS
tWC
tWC
LOW
HIGH
CS2
tSA
tHA
tSA
tPWB
tHA
tPWB
tHZWE
tLZWE
DOUT
DATA UNDEFINED⁽¹⁾
tHD
tHD
tSD
tSD
DIN
DATA
VALID
DATA
VALID
Notes:
1. If
is low during write cycle, tHZWE must be met in the application. Do not apply input signal during this period. Data output from the
previous READ operation will drive IO BUS.
2. Due to the restriction of note1, is recommended to be HIGH during write period.
3. Note
stays LOW in this example. If
toggles, tPWE and tHZWE must be considered.
Integrated Silicon Solution, Inc.- www.issi.com
12
Rev. 0B
12/9/2014