IS62WV12816EALL Datasheet, PDF (11/17 Pages) Integrated Silicon Solution, Inc – Three state outputs

IS62/65WV12816EALL
IS62/65WV12816EBLL
WRITE CYCLE NO. 3 ( CONTROLLED:
ADDRESS
LOW
IS LOW DURING WRITE CYCLE)
tWC
tSCS1
tHA
tSCS2
CS2
tAW
tPWE
tPWB
DOUT
DIN
tSA
tHZWE
DATA UNDEFINED⁽¹⁾
DATA UNDEFINED⁽¹⁾
HIGH-Z
tSD
tLZWE
tHD
DATA VALID
Notes:
1. If is low during write cycle, tHZWE must be met in the application. Do not apply input signal during this period. Data output from the previous
READ operation will drive IO BUS.
Integrated Silicon Solution, Inc.- www.issi.com
11
Rev. 0B
12/9/2014