IS61VPD51236A Datasheet, PDF (12/29 Pages) Integrated Silicon Solution, Inc – 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM

IS61VPD51236A, IS61VPD102418A,IS61LPD51236A,IS61LPD102418A
CAPACITANCE^(1,2)
Symbol
CIN
COUT
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
VIN = 0V
VOUT = 0V
Max.
6
8
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: TA = 25°C, f = 1 MHz, VDD = 3.3V.
Unit
pF
pF
ISSI ^®
3.3V I/O AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level
Output Load
Unit
0V to 3.0V
1.5 ns
1.5V
See Figures 1 and 2
AC TEST LOADS
ZO = 50Ω
Output
Buffer
Figure 1
50Ω
1.5V
3.3V
317 Ω
OUTPUT
5 pF
Including
jig and
scope
Figure 2
351 Ω
12
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. B
02/03/06