IS93C56A Datasheet, PDF (11/16 Pages) Integrated Silicon Solution, Inc – 2K-BIT/4K-BIT SERIAL ELECTRICALLY ERASABLE PROM

IS93C56A
IS93C66A
ISSI ^®
AC WAVEFORMS
FIGURE 6. WRITE ALL (WRALL) CYCLE TIMING
CS
DIN
10 0 0 1
DOUT
tCS
Dm
D0
tSV
BUSY READY
tWP
Notes:
1. After the completion of the instruction (DOUT is in READY status) then it may perform another instruction. If device is in BUSY status
(DOUT indicates BUSY status) then attempting to perform another instruction could cause device malfunction.
2. To determine data bits Dm-D0, see Instruction Set for the appropriate device.
FIGURE 7. WRITE DISABLE (WDS) CYCLE TIMING
tCS
CS
DIN
10 0 0 0
DOUT = 3-STATE
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
11
Rev. A
05/02/06