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IS61SP6464 Datasheet, PDF (10/20 Pages) Integrated Silicon Solution, Inc – 64K x 64 SYNCHRONOUS PIPELINE STATIC RAM | |||
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IS61SP6464
READ CYCLE SWITCHING CHARACTERISTICS (Over Operating Range)
Symbol Parameter
-6 ns
Min. Max.
tKC
Cycle Time
12
â
tKH
Clock High Time
4.5 â
tKL
Clock Low Time
4.5 â
tKQ
Clock Access Time
â
6
tKQX(1)
Clock High to Output Invalid
2.5 â
tKQLZ(1,2) Clock High to Output Low-Z
0
â
tKQHZ(1,2) Clock High to Output High-Z
2
5
tOEQ
Output Enable to Output Valid
â
5
tOEQX(1) Output Disable to Output Invalid
0
â
tOELZ(1,2) Output Enable to Output Low-Z
0
â
tOEHZ(1,2) Output Disable to Output High-Z
2
5
tAS
Address Setup Time
2.5 â
tSS
Address Status Setup Time
2.5 â
tWS
Write Setup Time
2.5 â
tCES
Chip Enable Setup Time
2.5 â
tAVS
Address Advance Setup Time
2.5 â
tAH
Address Hold Time
0.5 â
tSH
Address Status Hold Time
0.5 â
tWH
Write Hold Time
0.5 â
tCEH
Chip Enable Hold Time
0.5 â
tAVH
Address Advance Hold Time
0.5 â
Notes:
1. Guaranteed but not 100% tested. This parameter is periodically sampled.
2. Tested with load in Figure 2.
-7 ns
Min. Max.
13
â
5
â
5
â
â
7
3
â
0
â
2
5
â
5
0
â
0
â
2
5
2.5 â
2.5 â
2.5 â
2.5 â
2.5 â
0.5 â
0.5 â
0.5 â
0.5 â
0.5 â
ISSI ®
-8 ns
Min. Max. Unit
15
â
ns
6
â ns
6
â ns
â
8
ns
3
â ns
0
â ns
2
6
ns
â
5
ns
0
â ns
0
â ns
2
6
ns
2.5 â ns
2.5 â ns
2.5 â ns
2.5 â ns
2.5 â ns
0.5 â ns
0.5 â ns
0.5 â ns
0.5 â ns
0.5 â ns
10
Integrated Silicon Solution, Inc. â 1-800-379-4774
Rev. A
04/17/01
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