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ISL43231_06 Datasheet, PDF (9/15 Pages) Intersil Corporation – Low-Voltage, Single and Dual Supply, Triple SPDT Analog Switch | |||
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ISL43231
Test Circuits and Waveforms
3V
LOGIC
INPUT
0V
50%
tON
tr < 20ns
tf < 20ns
VNCX
SWITCH
OUTPUT 0V
tOFF
90% VOUT
90%
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. ENABLE tON / tOFF MEASUREMENT POINTS
C
V+
LOGIC
INPUT
V+
C
V-
C
EN, LE
NCX
NOX
EN
GND
COMX
ADDX
VOUT
RL
300â¦
CL
35pF
Repeat test for other switches. CL includes fixture and stray
capacitance.
VOUT = V(NO or NC) -R----L-----+--R--R---L--(--O-----N----)
FIGURE 1B. ENABLE tON / tOFF TEST CIRCUIT
3V
LOGIC
INPUT
0V
VNCX
SWITCH
OUTPUT
0V
VNOX
50%
tTRANS
VOUT
tr < 20ns
tf < 20ns
90%
10%
C
V+
V-
C
LOGIC
INPUT
V+
C
V-
C
NCX EN, LE
NOX
COMX
ADDX GND EN
VOUT
RL
300â¦
CL
35pF
tTRANS
Logic input waveform is inverted for switches that have the opposite
logic sense.
Repeat test for other switches. CL includes fixture and stray
capacitance.
VOUT = V(NO or NC) -R----L-----+--R--R---L--(--O-----N----)
FIGURE 1C. ADDRESS tTRANS MEASUREMENT POINTS
FIGURE 1D. ADDRESS tTRANS TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
V+
C
V-
C
LOGIC OFF
INPUT
ON
SWITCH
OUTPUT
VOUT
Q = âVOUT x CL
3V
OFF
0V
âVOUT
RG
EN, LE
COMX
NOX or NCX
0â¦
ADDX
VG
GND
EN
LOGIC
INPUT
FIGURE 2A. Q MEASUREMENT POINTS
Repeat test for other switches.
FIGURE 2B. Q TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
VOUT
CL
1nF
9
FN6054.2
February 27, 2006
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