ISL22319 Datasheet, PDF (9/13 Pages) Intersil Corporation – Single Digitally Controlled Potentiometer XDCP

ISL22319
Pin Description
Potentiometers Pins
RW
RW is the wiper terminal and is equivalent to the movable
terminal of a mechanical potentiometer. The position of the
wiper within the array is determined by the WR register.
SHDN
The active low SHDN pin forces the resistor to end-to-end
open circuit condition and shorts RWi to GND. When SHDN
is returned to logic high, the previous latch settings put RW
at the same resistance setting prior to shutdown. This pin is
logically ANDed with SHDN bit in ACR register. I²C interface
is still available in shutdown mode and all registers are
accessible. This pin must remain HIGH for normal operation
(see Figure 11).
RW
FIGURE 11. DCP CONNECTION IN SHUTDOWN MODE
Bus Interface Pins
SERIAL DATA INPUT/OUTPUT (SDA)
The SDA is a bidirectional serial data input/output pin for I²C
interface. It receives device address, operation code, wiper
address and data from an I²C external master device at the
rising edge of the serial clock SCL, and it shifts out data after
each falling edge of the serial clock.
SDA requires an external pull-up resistor, since it is an open
drain input/output.
SERIAL CLOCK (SCL)
This is the serial clock input of the I²C serial interface. SCL
requires an external pull-up resistor, since it is an open drain
input.
DEVICE ADDRESS (A1, A0)
The address inputs are used to set the least significant 2 bits
of the 7-bit I²C interface slave address. A match in the slave
address serial data stream must match with the Address
input pins in order to initiate communication with the
ISL22319. A maximum of 4 ISL22319 devices may occupy
the I²C serial bus.
Principles of Operation
The ISL22319 is an integrated circuit incorporating one DCP
with its associated registers, non-volatile memory and an I²C
serial interface providing direct communication between a
host and the potentiometer and memory. The resistor array
is comprised of individual resistors connected in series. At
either end of the array and between each resistor is an
electronic switch that transfers the potential at that point to
the wiper.
The electronic switches on the device operate in a “make
before break” mode when the wiper changes tap positions.
When the device is powered down, the last value stored in
IVR will be maintained in the non-volatile memory. When
power is restored, the contents of the IVR is recalled and
loaded into the WR to set the wiper to the initial value.
DCP Description
The DCP is implemented with a combination of resistor
elements and CMOS switches. The physical ends of each
DCP are equivalent to the fixed terminals of a mechanical
potentiometer and internally connected to V_CC and GND.
The RW pin of the DCP is connected to intermediate nodes,
and is equivalent to the wiper terminal of a mechanical
potentiometer. The position of the wiper terminal within the
DCP is controlled by an 7-bit volatile Wiper Register (WR).
When the WR of a DCP contains all zeroes (WR[6:0]= 00h),
its wiper terminal (RW) is closest to GND. When the WR
register of a DCP contains all ones (WR[6:0] = 7Fh), its wiper
terminal (RW) is closest to V_CC. As the value of the WR
increases from all zeroes (0) to all ones (127 decimal), the
wiper moves monotonically from the position closest to GND
to the closest to V_CC.
While the ISL22319 is being powered up, the WR is reset to
40h (64 decimal), which locates RW roughly at the center
between V_CC and GND. After the power supply voltage
becomes large enough for reliable non-volatile memory
reading, the WR will be reload with the value stored in a
non-volatile Initial Value Register (IVR).
The WR and IVR can be read or written to directly using the
I²C serial interface as described in the following sections.
Memory Description
The ISL22319 contains one non-volatile 8-bit register, known as
the Initial Value Register (IVR), and two volatile 8-bit registers,
Wiper Register (WR) and Access Control Register (ACR). The
memory map of ISL22319 is on Table 1. The non-volatile
register (IVR) at address 0, contains initial wiper position and
volatile register (WR) contains current wiper position.
ADDRESS
2
1
0
TABLE 1. MEMORY MAP
NON-VOLATILE
VOLATILE
—
ACR
Reserved
IVR
WR
The non-volatile IVR and volatile WR registers are
accessible with the same address.
9
FN6310.1
September 9, 2009