ISL22319 Datasheet, PDF (6/13 Pages) Intersil Corporation – Single Digitally Controlled Potentiometer XDCP

ISL22319
Operating Specifications Over the recommended operating conditions unless otherwise specified. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
(Note 14) (Note 3) (Note 14) UNIT
Rpu
SDA and SCL Bus Pull-up Resistor Maximum is determined by t_R and t_F
1
kΩ
Off-chip
For Cb = 400pF, max is about 2kΩ~2.5kΩ
For Cb = 40pF, max is about 15kΩ~20kΩ
t_SU:A A1 and A0 Setup Time
Before START condition
600
ns
t_HD:A A1 and A0 Hold Time
After STOP condition
600
ns
NOTES:
3. Typical values are for T_A = +25°C and 3.3V supply voltage.
4. LSB: [V(R_W)₁₂₇ – V(R_W)₀]/127. V(R_W)₁₂₇ and V(R_W)₀ are V(R_W) for the DCP register set to 7F hex and 00 hex respectively. LSB is the
incremental voltage when changing from one tap to an adjacent tap.
5. ZSerror = V(RW)₀/LSB.
6. FSerror = [V(RW)₁₂₇ – V_CC]/LSB.
7. DNL = [V(RW)_i – V(RW)_i-1]/LSB-1, for i = 1 to 127. i is the DCP register setting.
8. INL = [V(RW)_i – (i • LSB) – V(RW)₀]/LSB for i = 1 to 127
9. _TCV
=
-------^M-----^a----^x----⁽--^V----⁽---^R-----^W------⁾--ⁱ--⁾---–-----^M-----ⁱ--ⁿ----⁽--^V-----⁽--^R-----^W------⁾--ⁱ--⁾------ × ------¹---⁰----⁶------- ^{for i = 16 to 127 decimal, T = -40°C to +125°C. Max() is the maximum value of the wiper}
[Max(V(RW)_i) + Min(V(RW)_i)] ⁄ 2 +165°C voltage and Min () is the minimum value of the wiper voltage over the temperature range.
10. MI = |RW₁₂₇ – RW₀|/127. MI is a minimum increment. RW₁₂₇ and RW₀ are the measured resistances for the DCP register set to 7F hex and
00 hex respectively.
11. Roffset = RW₀/MI, when measuring between RW and RL.
Roffset = RW₁₂₇/MI, when measuring between RW and RH.
12. This parameter is not 100% tested.
13. t_WC is the time from a valid STOP condition at the end of a Write sequence of I²C serial interface, to the end of the self-timed internal non-volatile
write cycle.
14. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by
characterization and are not production tested.
SDA vs SCL Timing
t_F
t_HIGH
t_LOW
t_R
t_sp
t_HD:STO
SCL
t_SU:STA
SDA
(INPUT TIMING)
SDA
(OUTPUT TIMING)
t_SU:DAT
t_HD:STA
t_HD:DAT
t_AA t_DH
t_SU:STO
t_BUF
6
FN6310.1
September 9, 2009