82C284 Datasheet, PDF (9/11 Pages) Intersil Corporation – Clock Generator and Ready Interface for 80C286 Processors

82C284
UNTESTED SPECIFICATIONS (Continued)
10MHz
12.5MHz
SYMBOL
PARAMETER
MIN MAX MIN MAX UNITS
CONDlTIONS (NOTE 1)
t19
CLK Rise Time
t20
CLK Fall Time
t27
X1 HIGH to CLK
-
8
-
8
ns 1.0V to 3.6V, C_L = 100pF
-
8
-
8
ns 3.6V to 1.0V, C_L = 100pF
-
35
-
30
ns (Note 4)
NOTES:
1. The parameters listed in this table are controlled via design or, process parameters and are not directly tested. These parameters are
characterized upon initial design and after major process and/or design changes.
2. Measured from 3.2V on the EFI waveform to 1.0V on the CLK.
3. Measured from 0.8V on the EFI waveform to 3.6V on the CLK.
4. Measured from 3.6V on the X1 input to 3.6V on the CLK.
AC Specifications
AC Test Condition
3.2V
EFI INPUT
CLK
OUTPUT
F/C
INPUT
RES
INPUT
0.8V
t_DELAY (MAX)
t_SETUP
3.6V
1.0V
3.2V 3.2V
0.8V 0.8V
3.8V
0.4V
V_CC - 0.4V
3.6V
1.0V _0.4V
t_HOLD
3.8V
0.4V
VCC - 0.8V
0.8V 0.8V
V_CC - 0.4V
0.4V
OTHER
DEVICE
INPUT
DEVICE
OUTPUT
2.0V 2.0V
0.8V 0.8V
t_DELAY (MAX)
t_DELAY (MIN)
2.0V
0.8V
2.4
0.4V
V_CC
R_L
DEVICE
OUTPUT
C_L
FIGURE 8.
TEST CONDITION
1
2
3
R_L
750Ω
620Ω
∞
FIGURE 7. A.C. DRIVE, SETUP, HOLD AND DELAY TIME
MEASUREMENT POINTS
C_L
75pF
150pF
75pF
9