82C284 Datasheet, PDF (11/11 Pages) Intersil Corporation – Clock Generator and Ready Interface for 80C286 Processors

Waveforms (Continued)
CLK
PCLK
F/C
X1
φ1
φ2
t₇
t₈
82C284
φ1
φ2
φ1 φ2
t₂₇
CLK
φ1 φ2 φ1
φ2
PCLK
φ1
φ2
F/C ^t7
t₈
EFI
t_15B
NOTE:
1. This is an asynchronous input. The setup and hold times are required to guarantee the response shown.
FIGURE 12. CLK AS A FUNCTION OF F/C, PCLK, X1, AND EFI DURING DYNAMIC FREQUENCY SWITCHING
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