X28HC256 Datasheet, PDF (8/15 Pages) Xicor Inc. – 5 Volt, Byte Alterable E2PROM

X28HC256
SOFTWARE ALGORITHM
Selecting the software data protection mode requires
the host system to precede data write operations by a
series of three write operations to three specific
addresses. Refer to Figure 6 and 7 for the sequence.
The three-byte sequence opens the page write window,
enabling the host to write from one to one hundred
twenty-eight bytes of data. Once the page load cycle
has been completed, the device will automatically be
returned to the data protected state.
SOFTWARE DATA PROTECTION
Figure 6. Timing Sequence—Byte or Page Write
V_CC
0V
(V_CC)
Data
Address
CE
AAA
5555
55
2AAA
WE
A0
5555
≤ t_{BLC MAX}
Writes
ok
t_WC
Byte
or
Age
Write
Protected
Figure 7. Write Sequence for Software Data
Protection
Write Data AA
to Address
5555
Write Data 55
to Address
2AAA
Write Data A0
to Address
5555
Write Data XX
to Any
Address
Write Last
Byte to
Last Address
Byte/Page
Load Enabled
Optional
Byte/Page
Load Operation
After t_WC
Re-Enters Data
Protected State
Regardless of whether the device has previously been
protected or not, once the software data protection
algorithm is used and data has been written, the
X28HC256 will automatically disable further writes
unless another command is issued to cancel it. If no
further commands are issued the X28HC256 will be
write protected during power-down and after any sub-
sequent power-up.
Note: Once initiated, the sequence of write operations
should not be interrupted.
8
FN8108.1
May 17, 2006