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X28HC256 Datasheet, PDF (4/15 Pages) Xicor Inc. – 5 Volt, Byte Alterable E2PROM
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PIN CONFIGURATION
PLASTIC DIP
CERDIP
FLAT PLASTIC
SOIC
A14
1
28
VCC
A12
2
27 WE
A7
3
26
A13
A6
4
25
A8
A5
5
24
A9
A4
6
23
A11
A3
A2
7
22
8 X28HC256 21
OE
A10
A1
9
20 CE
A0
10
19
I/O7
I/O0 11
18
I/O6
I/O1 12
17
I/O5
I/O2
13
16
I/O4
VSS
14
15
I/O3
X28HC256
LCC
PLCC
4 3 2 1 32 31 30
A6
5
29 A8
A5
6
28 A9
A4
7
27
A11
A3
8
A2
9
X28HC256
(Top View)
A1
10
26 NC
25 OE
24
A10
A0
11
23 CE
NC 12
22 I/O7
I/O0
13
21
14 15 16 17 18 19 20
I/O6
PGA
I/O1 I/O2 I/O3 I/O5 I/O6
12
13
15
17
18
I/O0 A0
11 10
VSS I/O4 I/O7
14
16
19
A1
A2
9
8
CE
A 10
20
21
X28HC256
A3
A4
OE
A11
7
6
22
23
A5
A12
VCC A9
A8
5
2
28
24
25
A6
A7
A14 WE
A13
4
3
1
27
26
(Bottom View)
PIN DESCRIPTIONS
Addresses (A0-A14)
The Address inputs select an 8-bit memory location
during a read or write operation.
Chip Enable (CE)
The Chip Enable input must be LOW to enable all
read/write operations. When CE is HIGH, power con-
sumption is reduced.
Output Enable (OE)
The Output Enable input controls the data output buff-
ers, and is used to initiate read operations.
Data In/Data Out (I/O0-I/O7)
Data is written to or read from the X28HC256 through
the I/O pins.
Write Enable (WE)
The Write Enable input controls the writing of data to
the X28HC256.
PIN NAMES
Symbol
A0-A14
I/O0-I/O7
WE
CE
OE
VCC
VSS
NC
Description
Address Inputs
Data Input/Output
Write Enable
Chip Enable
Output Enable
+5V
Ground
No Connect
4
FN8108.1
May 17, 2006
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