ISL6312A Datasheet, PDF (8/35 Pages) Intersil Corporation – Four-Phase Buck PWM Controller with Integrated MOSFET Drivers for Intel VR10, VR11, and AMD Applications

ISL6312A
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Specified. (Continued)
PARAMETER
TEST CONDITIONS
MIN
MAX
(Note 4) TYP (Note 4) UNITS
LGATE Rise Time
UGATE Fall Time
LGATE Fall Time
UGATE Turn-On Non-Overlap
LGATE Turn-On Non-Overlap
GATE DRIVE RESISTANCE (Note 3)
t_RLGATE; V_PVCC = 12V, 3nF load, 10% to 90%
t_FUGATE; V_PVCC = 12V, 3nF load, 90% to 10%
t_FLGATE; V_PVCC = 12V, 3nF load, 90% to 10%
t_PDHUGATE; V_PVCC = 12V, 3nF load, adaptive
t_PDHLGATE; V_PVCC = 12V, 3nF load, adaptive
-
18
-
ns
-
18
-
ns
-
12
-
ns
-
10
-
ns
-
10
-
ns
Upper Drive Source Resistance
Upper Drive Sink Resistance
Lower Drive Source Resistance
Lower Drive Sink Resistance
OVER-TEMPERATURE SHUTDOWN (Note 3)
V_PVCC = 12V, 15mA source current
V_PVCC = 12V, 15mA sink current
V_PVCC = 12V, 15mA source current
V_PVCC = 12V, 15mA sink current
1.25
2.0
3.0
Ω
0.9
1.65
3.0
Ω
0.85
1.25
2.2
Ω
0.60
0.80
1.35
Ω
Thermal Shutdown Setpoint
-
160
-
°C
Thermal Recovery Setpoint
-
100
-
°C
NOTES:
3. Limits established by characterization and are not production tested.
4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
Timing Diagram
UGATE
LGATE
t_PDHUGATE
t_RUGATE
t_FUGATE
t_FLGATE
t_PDHLGATE
t_RLGATE
8
FN9290.4
April 29, 2010