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ISL6312A Datasheet, PDF (13/35 Pages) Intersil Corporation – Four-Phase Buck PWM Controller with Integrated MOSFET Drivers for Intel VR10, VR11, and AMD Applications
ISL6312A
⎛
⎝
--s-----⋅---L---
DCR
+
1⎠⎞
VC(s)
=
-------------------------------------------------------
⎛
⎜
⎝
s
⋅
(---R-----1----⋅---R-----2---)
R1 + R2
⋅
C
+
⎞
1⎟
⎠
⋅
K
⋅
D
C
R
⋅
IL
(EQ. 5)
K
=
-------R-----2--------
R2 + R1
(EQ. 6)
If the R-C network components are selected such that the
RC time constant matches the inductor L/DCR time
constant, then VC is equal to the voltage drop across the
DCR multiplied by the ratio of the resistor divider, K. If a
resistor divider is not being used, the value for K is 1.
The capacitor voltage VC, is then replicated across the
sense resistor RISEN. The current through RISEN is
proportional to the inductor current. Equation 7 shows that
the proportion between the channel current and the sensed
current (ISEN) is driven by the value of the sense resistor,
the resistor divider ratio, and the DCR of the inductor.
ISEN
=
K
⋅
IL
⋅
---D----C-----R-----
RISEN
(EQ. 7)
Output Voltage Setting
The ISL6312A uses a digital to analog converter (DAC) to
generate a reference voltage based on the logic signals at
the VID pins. The DAC decodes the logic signals into one of
the discrete voltages shown in Tables 2, 3, 4 and 5. In Intel
modes of operation, each VID pin is pulled up to an internal
1.2V voltage by a weak current source (40µA), which
decreases to 0A as the voltage at the VID pin varies from 0
to the internal 1.2V pull-up voltage. In AMD modes of
operation the VID pins are pulled low by a weak 20µA
current source. External pull-up resistors or active-high
output stages can augment the pull-up current sources, up to
a voltage of 5V.
The ISL6312A accommodates four different DAC ranges:
Intel VR10 (Extended), Intel VR11, AMD K8/K9 5-bit, and
AMD 6-bit. The state of the VRSEL and VID7 pins decide
which DAC version is active. Refer to Table 1 for a
description of how to select the desired DAC version.
TABLE 1. ISL6312A DAC SELECT TABLE
DAC VERSION
VRSEL PIN
VID7 PIN
VR10 (Extended)
VRSEL < 0.6V
-
VR11
0.8V < VRSEL < 3.0V
-
AMD 5-Bit
3.0V < VRSEL < VCC
low
AMD 6-Bit
3.0V < VRSEL < VCC
high
TABLE 2. VR10 (EXTENDED) VOLTAGE IDENTIFICATION
CODES
VID4 VID3 VID2 VID1 VID0 VID5 VID6 VDAC
0
1
0
1
0
1
1 1.60000
0
1
0
1
0
1
0 1.59375
0
1
0
1
1
0
1 1.58750
0
1
0
1
1
0
0 1.58125
0
1
0
1
1
1
1 1.57500
0
1
0
1
1
1
0 1.56875
0
1
1
0
0
0
1 1.56250
0
1
1
0
0
0
0 1.55625
0
1
1
0
0
1
1 1.55000
0
1
1
0
0
1
0 1.54375
0
1
1
0
1
0
1 1.53750
0
1
1
0
1
0
0 1.53125
0
1
1
0
1
1
1 1.52500
0
1
1
0
1
1
0 1.51875
0
1
1
1
0
0
1 1.51250
0
1
1
1
0
0
0 1.50625
0
1
1
1
0
1
1 1.50000
0
1
1
1
0
1
0 1.49375
0
1
1
1
1
0
1 1.48750
0
1
1
1
1
0
0 1.48125
0
1
1
1
1
1
1 1.47500
0
1
1
1
1
1
0 1.46875
1
0
0
0
0
0
1 1.46250
1
0
0
0
0
0
0 1.45625
1
0
0
0
0
1
1 1.45000
1
0
0
0
0
1
0 1.44375
1
0
0
0
1
0
1 1.43750
1
0
0
0
1
0
0 1.43125
1
0
0
0
1
1
1 1.42500
1
0
0
0
1
1
0 1.41875
1
0
0
1
0
0
1 1.41250
1
0
0
1
0
0
0 1.40625
1
0
0
1
0
1
1 1.40000
1
0
0
1
0
1
0 1.39375
1
0
0
1
1
0
1 1.38750
1
0
0
1
1
0
0 1.38125
1
0
0
1
1
1
1 1.37500
1
0
0
1
1
1
0 1.36875
1
0
1
0
0
0
1 1.36250
13
FN9290.4
April 29, 2010