ISL55100A_14 Datasheet, PDF (8/14 Pages) Intersil Corporation – Quad 18V Pin Electronics Driver/Window Comparator

ISL55100A
Application Information
The ISL55100A provides Quad pin drivers and Quad dual level
comparator receivers in a small footprint. The four channels
may be used as bidirectional or split channels. Drivers have per
channel level, data and high impedance controls, while
comparators have per channel high and low threshold levels.
Receiver Features
The receivers are four independent window comparators that
feature high output current capability, and user defined high and
low output levels to interface with a wide variety of logic
families. Each receiver, comprises two comparators and each
comparator has an independent threshold level input, making it
easy to implement window comparator functions. The CVA and
CVB pins set the threshold levels of the A and B comparators
respectively. COMP HIGH and COMP LOW set all the comparator
output levels, and COMP HIGH must be more positive than
COMP LOW. These two inputs are unbuffered supply pins, so the
sources driving these pins must provide adequate current for the
expected load. COMP HIGH and COMP LOW typically connect to
the power supplies of the logic device driven by the comparator
outputs. The “Truth Table” for Receivers is on page 3. Receiver
outputs are not tri-statable, and do not incorporate any on-chip
short-circuit current protection. Momentary short circuits to
GND, or any supply voltage, won’t cause permanent damage,
but care must be taken to avoid longer duration short circuits. If
tolerable to the application, current limiting resistors can be
inserted in series with the QA(0 to 3) and QB(0 to 3) Outputs to
protect the receiver outputs from damage due to overcurrent
conditions.
Driver Features
The drivers are single-ended outputs featuring a wide voltage
range, an output stage capable of delivering 200mA while
providing a low out resistance and tri-state capability.
Additionally, the driver output can be toggled to drive one of
two user defined output levels High (VH) or Low (VL).
Driver waveforms are greatly affected by load characteristics.
The ISL55100A actually double bonds the VH(0 to 3) and
VL(0 to 3) supply pins for each channel. The Driver Output Pins
(DOUT(0 to 3)) are triple bonded. Multiple bond wires help
reduce the effects of Inductance between the IC Die (Wafer)
and the packaging. Also the QFN style of packaging reduces
inductance over other types of packaging.
While the inductance of a bond wire might seem insignificant,
it can reduce high-frequency waveform fidelity. Therefore, this
should be borne in mind when doing PCB layout and DUT
interconnect. Lead lengths should be kept as short as possible,
maintaining as much decoupling on the drive rails as possible
and make sure scope measurements are made properly. Often
the inductance of a scope probe ground can be the actual
cause of the waveform distortion.
VH and VL (Driver Output Rails)
There are sets of VH and VL pins designated for each driver.
These are unbuffered analog inputs that determine the Drive
High (VH) and Drive Low (VL) Voltages that the drivers will
deliver. These inputs are double bonded to reduce inductance
and decrease AC Impedance.
Each VH and VL should be decoupled with 4.7µF and 0.1µF
capacitors to ground. If all four VH/VLs are bussed per device
then one 4.7µF can be used for multiple VH/VL pins. Layouts
should also accommodate the placement of capacitance
“across” VH and VL. So in addition to decoupling the VH/VL
pins to ground, they are also decoupled to each other.
Logic Inputs
The ISL55100A uses differential mode digital inputs, and can
therefore mate directly with LVDS or CML outputs.
Single-ended logic families are handled by connecting one of
the digital input pins to an appropriate threshold voltage (e.g.,
1.4V for TTL compatibility).
LOWSWING Circuit Option
The drivers include switchable circuitry that is optimized for
either low (VH - VL < 3V) or high output swings, and this
selection is accomplished via the LOWSWING pin. Connecting
LOWSWING to VEE selects the circuits optimized for low
overshoots at low swings, while tying the pin V_CC enables the
large signal circuitry (see Figure 7).
With LOWSWING = V_EE, the low swing circuitry activates
whenever VH < V_EE + 5V, and the VH and VL currents increase,
so for the lowest power dissipation set LOWSWING = V_EE only if
the output swing (VH - VL) is less than 3V, and better than 10%
overshoots are required.
For the best small signal performance, the VH/VL common
mode voltage [(VH + VL)/2] must be V_EE + 1.5V. So if V_EE = 0V,
and the desired swing is 500mV, set VH = 1.75V, and
VL = 1.25V.
Driver and Receiver Overload Protection
The ISL55100A is designed to provide minimum and balanced
Driver R_OUT. Great care should be taken when making use of
the ISL55100A low R_OUT drivers as there is no internal
protection. There is no short-circuit protection built into either
the driver or the receiver/comparator outputs. Also there are
no junction temperature monitors or thermal shutdown
features.
The driver or receiver outputs may be damaged by more than a
momentary short-circuit directly to any low impedance voltage.
If included, a 50Ω Series Termination Resistor provides
suitable driver protection, but should be properly rated.
External Logic Supply Option (V_EXT)
Connection of the V_EXT Pin to a 5.5V DC Source (Referenced to
V_EE) will reduce the V_CC - V_EE current drain. Current drain is
directly proportional to Data Rate. This option will help with
Power Supply/Dissipation should heat distribution become an
issue.
Power Supply Bypassing and Printed Circuit
Board Layout
As with any high frequency device, good printed circuit board
layout is necessary for optimum performance. Ground plane
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FN7486.3
December 4, 2014