CD4504BMS Datasheet, PDF(8/8 Page) Intersil Corporation – CMOS Hex Voltage Level Shifter for TTL-to-CMOS or CMOS-to-CMOS Operation

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

CD4504BMS Datasheet, PDF (8/8 Pages) Intersil Corporation – CMOS Hex Voltage Level Shifter for TTL-to-CMOS or CMOS-to-CMOS Operation

◁

CD4504BMS

Typical Performance Characteristics (Continued)

AMBIENT TEMPERATURE

(TA) = +25oC

CMOS MODE =

RECOMMENDED

OPERATING

CONDITIONS

TTL MODE =

5 10 15 20 25

SUPPLY VOLTAGE (VCC) (V)

FIGURE 7. HIGH LEVEL SUPPLY VOLTAGE vs LOW LEVEL SUPPLY VOLTAGE

Chip Dimensions and Pad Layout

Dimensions in parenthesis are in millimeters and are

derived from the basic inch dimensions as indicated.

Grid graduations are in mils (10-3 inch).

METALLIZATION: Thickness: 11kÃ â 14kÃ, AL.

PASSIVATION: 10.4kÃ - 15.6kÃ, Silane

BOND PADS: 0.004 inches X 0.004 inches MIN

DIE THICKNESS: 0.0198 inches - 0.0218 inches

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certiï¬cation.

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or speciï¬cations at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate

and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which

may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

1147